Ground in mixed signal PCB

[beandigital]

I have a design that uses an infrared image sensor that has an analog output with very low noise (200uVrms). The device has digital inputs for clock and reset that control the output analog signal. I am doing the design for someone who wants analog and digital grounds. At the moment I have a design that uses 6 layers. I have analog signals on L1, then a GND plane on L2. L3 is a 5V analog plane and L4 another GND plane. The digital signals are routed on L6, bottom layer. L5 is a 3.3V digital power plane. I am looking for opinions on whether this will be good enough in terms of noise. I should mention that the sensor analog signal is sampled by a 16-bit ADC. I am not sure that splitting the L2 GND plane is required as there isnt any digital tracks referencing the plane.  Thanks

[Gibson486]

 I will warn you....Ask 7 EEs about ground planes, and you will get 9 answers back.

From my experience, splitting digital and analog ground planes does not work as people perceive. The only time I do it is when I have something the is very high current mixed with something that is sensitive.

I have met engineers who swear by it and I cannot argue because the design worked I have also met engineers that were burnt by it. Use your best judgement.

At the end of the day, it is all about ground current. You need to pay attenuation to what references what and what signals go where. Some cuts in the ground plane can help, but you need to be careful because that can lead to other issues as well.

Good Luck.

[tomato]

I have a design that uses an infrared image sensor that has an analog output with very low noise (200uVrms). The device has digital inputs for clock and reset that control the output analog signal. I am doing the design for someone who wants analog and digital grounds. At the moment I have a design that uses 6 layers. I have analog signals on L1, then a GND plane on L2. L3 is a 5V analog plane and L4 another GND plane. The digital signals are routed on L6, bottom layer. L5 is a 3.3V digital power plane. I am looking for opinions on whether this will be good enough in terms of noise. I should mention that the sensor analog signal is sampled by a 16-bit ADC. I am not sure that splitting the L2 GND plane is required as there isnt any digital tracks referencing the plane.  Thanks

That's pretty much impossible for anyone to answer.

[tszaboo]

I'm with the ones, who say, that all GND should be connected together with as much copper as possible, and does this  , when I see AGND and DGND in a system. Digital return current will flow under the digital signal. If there is problems with voltage drop over a solid groundplane, you should've used differential analog signal in the first place. But I've also seen capacitors on digital lines, which "will make it less noisy"  .

[ConKbot]

Does the sensor even have AGnd and DGnd pins? If not, I wouldn't even consider it as a option.
Plus rather than trying to isolate noise and ground bounce, eliminate the source. What is the maximum rise/fall times for the digital inputs? What's the input capacitance? Either drive them with a slew-rate controlled driver, or add series resistance that increases the rise/fall times to close to the maximum, with a comfortable margin for tolerance and variation in the ICs, while maintaining setup and hold times required.

Also, if you can do it, use synchronous sampling to avoid sampling your low noise analog while you are fiddling with the digital IOs. Assuming the imaging chip is clocking out different analog pixels, why would you even be sampling before the clock edge is even settled? From the clock edge, to a propagation delay, to a settling time on the output, amp, and ADC, if the clock signal isn't ringing, it should be settled and in a static DC state.

Splitting ground planes and not causing more problems for yourself than you solve requires every return current and current loop to be accounted for. Both low-frequency ones following least resistance, and higher frequency ones following least impedance. It can be done with success, but personally, I avoid it unless I have very good reasons to.

[CopperCone]

Keep in mind I am pretty sure that decreasing slew rate by way of impedance or current control means that you will have signals that have more phase jitter and less noise margin

I am pretty sure there is a trade off there. The faster edge you have, the lower period of time a noise spike has to interfere. I believe it to be statistical.

[beandigital]

Thanks for the replies. Can anyone see an issue with doing something like the attached image?
So I would have an analog and digital plane on two separate layers. They would be connected together at one point which is the sensor GND pin. The main power ground would go to the digital plane. The analog ground would be connected to the main ground through the digital ground. That way any analog noise would just have a small effect on the digital rather than the other way round.

[Gibson486]

Thanks for the replies. Can anyone see an issue with doing something like the attached image?
So I would have an analog and digital plane on two separate layers. They would be connected together at one point which is the sensor GND pin. The main power ground would go to the digital plane. The analog ground would be connected to the main ground through the digital ground. That way any analog noise would just have a small effect on the digital rather than the other way round.

So lets say you go through with your design....

How do you separate the grounds even though they are the same? The "trick" that people do is that they use a 0 ohm resistor(s) to jumper the grounds together. However, think of this....you are forcing all your current to go through those 0 ohm resistors. Yeah, could use multiple, but how many is good enough?

You say they will all meet at the sensor ground pin? That would be bad. Your sensor needs to be on a clean reference. If you have constant current flowing to it, your reference will not be stable at that point. You may be able to get away with it if you are just using a 10 bit ADC, but you will feel the hurt once you move past 12 bits.

Also, your 5V regulator is gonna have a lot of resistance on ground (it has to travel through a lot of places). Do not be surprised if the regulator does not get regulation close to its spec. 

[Gibson486]

I'm with the ones, who say, that all GND should be connected together with as much copper as possible, and does this  , when I see AGND and DGND in a system. Digital return current will flow under the digital signal. If there is problems with voltage drop over a solid groundplane, you should've used differential analog signal in the first place. But I've also seen capacitors on digital lines, which "will make it less noisy"  .

I have seen that too...My boss hired a consultant so we could get feedback on our design. I had to object (or simply ignore) to splitting the grounds and adding caps.

 

[beandigital]

I see your point about the current flow. I dont really want to do this but the guy who I am doing the job for is quite insistent that he wants the sensor on an analog ground. 

[Gibson486]

I see your point about the current flow. I dont really want to do this but the guy who I am doing the job for is quite insistent that he wants the sensor on an analog ground.

Been there, done that. At some point, you just need to take orders and deal with it. However, at some point, the guy telling you needs to understand that if he is really insistent on doing it, then maybe he should just do it himself. At the end of the day, if this is a 10 or 12 bit ADC, it would probably work and that guy is gonna think his logic on this was correct. Oh well.

[David Hess]

I have a design that uses an infrared image sensor that has an analog output with very low noise (200uVrms).

At the moment I have a design that uses 6 layers. I have analog signals on L1, then a GND plane on L2. L3 is a 5V analog plane and L4 another GND plane. The digital signals are routed on L6, bottom layer. L5 is a 3.3V digital power plane.

I am looking for opinions on whether this will be good enough in terms of noise. I should mention that the sensor analog signal is sampled by a 16-bit ADC.

No, it will not be good enough to support 16 bit resolution but most applications with 16 bit converters do not support 16 bit resolution anyway.  200uVrms of noise from the sensor will not support 16 bit resolution either; I might believe 12 bits.

If the application allows it, for best performance I would place the converter on its own isolated minimum size analog ground plane encompassing the sensor's analog output and the ADCs input.  Digital return currents to both the sensor and ADC need to be routed away from the analog ground which will be a major problem when both have digital signals going to them from the same digital domain.

If the ADC cannot be placed adjacent to the sensor, then noise between their separate grounds needs to be removed using differential signaling or remote sense or some similar technique.  This might be necessary even if they are adjacent and some ADCs make this easier by incorporating differential inputs which can be used to sense a remote ground.

[capt bullshot]

I will warn you....Ask 7 EEs about ground planes, and you will get 9 answers back.

From my experience, splitting digital and analog ground planes does not work as people perceive. The only time I do it is when I have something the is very high current mixed with something that is sensitive.

Here's the 8th engineer who totally agrees to your opinion (from own experience).

[Bassman59]

I will warn you....Ask 7 EEs about ground planes, and you will get 9 answers back.

From my experience, splitting digital and analog ground planes does not work as people perceive. The only time I do it is when I have something the is very high current mixed with something that is sensitive.

Here's the 8th engineer who totally agrees to your opinion (from own experience).

I'm Number 9.

[Howardlong]

I will warn you....Ask 7 EEs about ground planes, and you will get 9 answers back.

From my experience, splitting digital and analog ground planes does not work as people perceive. The only time I do it is when I have something the is very high current mixed with something that is sensitive.

Here's the 8th engineer who totally agrees to your opinion (from own experience).

I'm Number 9.

Number 10 reporting in.

[jbb]

Thanks for the replies. Can anyone see an issue with doing something like the attached image?

You'd need to be careful to prevent the noise on the 6V supply from coupling into the analog ground plane as noise current, which would turn into noise voltage at the AGND - DGND connection point.

I see your point about the current flow. I dont really want to do this but the guy who I am doing the job for is quite insistent that he wants the sensor on an analog ground.

What does the camera datasheet / application note say?  What does the ADC data sheet / application note say? They may provide recommended layouts which can help you make decisions.

Can you sketch the rough arrangement of the board?  It may be possible to use solid ground planes and arrange the board so that the analog and digital return currents flow through different parts of the board.  You can then make part of it 'analog ground' by annotating the design (so whoever does maintenance doesn't mess it up).

[SiliconWizard]

I'm with the ones, who say, that all GND should be connected together with as much copper as possible, and does this  , when I see AGND and DGND in a system. Digital return current will flow under the digital signal. If there is problems with voltage drop over a solid groundplane, you should've used differential analog signal in the first place. But I've also seen capacitors on digital lines, which "will make it less noisy"  .

Yup. I'm with you on this one. (On digital lines, the only acceptable way is to add series resistors, as long as you still meet your timing requirements.)

It's all about current paths - not about "splitting" ground. You absolutely don't need to split ground to avoid noise. You have to care about how current will flow - and it just takes the shortest path. Using proper power supply areas and restricting signals in their own areas is adequate. Please don't play with ground. It doesn't like that most of the time. 

But yes, this ground split thing was once kinda in favor, partly due to misconceptions, but also due to the fact that designers were used to dealing with single-layer PCBs, two-layer on fancy projects! So this was much harder to get very low impedance on the whole board. Also, this technique made more sense for low frequency signals. In this case, splitting techniques done properly (which is hard) were having benefits. But with today's tools and standards, it's a whole other story. We now tend to pour copper all over our boards and use 4-layer PCBs, or more.

Ground is by definition and by nature a reference potential. It should be made so by all means in most cases. "Splitting" it is often just a recipe for getting equipotentiality problems, especially at high frequencies, and thus for adding  more noise than you'll remove. Only in a very few particular situations, this could be useful (as in low frequency, very low noise designs), but very difficult to do right.

Just a few pointers: https://learnemc.com/some-of-the-worst-emc-design-guidelines

[tomato]

From my experience, splitting digital and analog ground planes does not work as people perceive. The only time I do it is when I have something the is very high current mixed with something that is sensitive.

So, the only time you split ground planes is when they need to be split?