My Engineering Journey of Overengineering a Night Light

[Prince Charming]

I had been intrigued by the idea of making the perfect nightlight, even though it is a simple concept. Not only because we really need one at home (although it is certainly not something we cannot live without), but also because I knew it would teach me a lot.

I’ve built the first prototype and documented the whole process like a technical diary. Every design decision, mistake, experiment, and bit of tinkering is documented straight from my head. I’ve tried to be transparent about how I approached the problem and why I made the choices I did.

Feedback on my engineering approach, methodology, and anything else you notice would be greatly appreciated.

https://princeofduloc.github.io/NightGlow/Design%20Walkthrough/NightGlow%20Design%20Walkthrough.html

[dobsonr741]

First, agree with the over engineering statement.

Would have avoidable if engineering work preceeded with:
Product design
Economic study

You’ve ended up designing a ceiling mount light fixture, not a night light. AI have a heavy footprint on the writing and formatting. Another thing to consider to set up a skill that adopts your own style and visuals, not the cookie cutter.

Consider posting on Element14.

[MariuszD]

Attempting to connect rectified mains voltage to the TL431 must end in the components burning out.

I drew the path of the current.

[xvr]

Why not just connect a capacitive dropper to the DB1 output (and do away with BD2 altogether)?

[Prince Charming]

@dobsonr741
If this was really meant for mass production I think component cost would be trivial. PCB manufacturing and enclosure molding would make the cost. Anyway, that wasn't the goal so overengineering is okay. Also, I used AI just to rephrase my sentences because the text it produces is much more readable than mine, which is important for the attention span of the readers. AI produced nearly zero new ideas, and I am disappointed about it because I hoped it would be more useful. At least it has been great at markdown and coding.

@MariuszD
Why didn't you tell me this months ago!! Damn. It took you seconds to figure that out whereas it took me painful experiments detailed in section '7.2.4 Overcurrent and Overvoltage Failure Investigation'. And I am once again embarrassed. Okay from now on I will ask you to confirm my design

@xvr
Cap dropper needs to see fluctuating voltage to work with but the DB1 output is DC so it wouldn't work.
But ofc I am well aware that you must be a competent engineer to figure that out already. So I gave my brain a workout and I am guessing you propose to involve a diode after the cap dropper such as below:
https://ibb.co/rfTKHbDZ
I'm just thinking on the foot. The negative alternans is not really mandatory for cap dropper to work as long as the potential keeps changing. I'm starting to think outside the box now. Please elaborate your proposal if different than mine.


Thanks everyone for the attention.

[xvr]

So I gave my brain a workout and I am guessing you propose to involve a diode after the cap dropper such as below:
https://ibb.co/rfTKHbDZ

Yes. The circuit is slightly different, but it might work (though I'm not sure it will). Try simulating it in LTSpice (or any other Spice program). It should be safer than blowing another fuse

[Prince Charming]

@xvr

Alright everyone, I am patenting this topology called Prince Charge Pump which can be somewhat described as inverse Dickson charge pump based on my google searches.

After thinking and simulating I realized my previous guess on the topology lacks the charge/discharge control. The 12V rail is fed for some time but then discharged later. I'm pretty bad at simulation but I guess I got something useful:


alternative link for simulation screenshot: https://imgur.com/a/Ws3JqcS

n008: D12_Cathode
n006: D12_Anode (GND of the new topology)
n010: D11_Cathode
n012: D11_Anode (GND of the old topology, the one used in the report)

So please focus on (n008-n006) and (n010-n012) for regulation performance.

I managed to get similar performance from both, so at least my crude simulation verifies the design. One thing I noticed and expected was the need to increase the capacitance of the dropper capacitor in the new design to keep regulation going. I was expecting this because it sees less dV meaning less current, but I didn't expect the difference to be that large, 220nF vs 4.7uF (x21). The final value should be found empirically. At least now the capacitor only sees single polarity of voltage meaning electrolytic caps can be utilized and higher capacitance requirement is no issue. I also decreased the inrush limiter resistor (R1) just to get the time constant or RC well away from the rectified AC period, probably wasn't mandatory but doesn't matter anyway.

[MariuszD]

Why didn't you tell me this months ago!! Damn. It took you seconds to figure that out whereas it took me painful experiments detailed in section '7.2.4 Overcurrent and Overvoltage Failure Investigation'. And I am once again embarrassed. Okay from now on I will ask you to confirm my design

When you have two rectifiers connected at the inputs and outputs, you should expect problems. You always need to analyze the currents flowing from one rectifier to the other.


You can use the current of the main filter capacitor.

 But it might be necessary to add a capacitor in parallel with D7 to avoid degrading the filtering.

The second option is to increase the pulsations by using valley-fill PFC.


The third option is to use the AC voltage on the drain. These circuits may not start on their own, so initial polarization with a resistor may be necessary.

[Prince Charming]

@MariuszD

Ooh I know the topology in your first picture, it is Prince Charge Pump. Yeah it is a very smart circuit, its inventor should be a brilliant person.

But why do you think D7 may need a capacitor, the input is sinusoidal so there is no rapid change, I couldn't see any spike the diode might be taking (except the rare incident of when the device is powered up).

Also I am guessing you proposed valley-fill as an alternative because it would decrease the ripple on the 12V rail. But previously I concluded it would sacrifice the main line voltage. A quote from my report: "A valley-fill passive PFC topology was also evaluated, but this method introduces a large input voltage ripple—typically reducing the instantaneous input voltage to approximately half of the peak value each cycle. Such excessive ripple was deemed unnecessary and is expected to negatively impact overall efficiency." Increasing the capacitor size felt like a safer bet for the same purpose but thank you for the perspective anyway.

Update: I've added this solution to the Alternative Design Solutions under section 7.2.4

My goal was just to share the project and didn't expect to be contributed. Thanks to you benevolent people.

[MariuszD]

But why do you think D7 may need a capacitor, the input is sinusoidal so there is no rapid change, I couldn't see any spike the diode might be taking (except the rare incident of when the device is powered up).

Note that one capacitor filters the rectified voltage and powers the rectifier. The filtering of rapidly changing waveforms from the converter may be worse.

Also I am guessing you proposed valley-fill as an alternative because it would decrease the ripple on the 12V rail.

No.

But previously I concluded it would sacrifice the main line voltage. A quote from my report: "A valley-fill passive PFC topology was also evaluated, but this method introduces a large input voltage ripple—typically reducing the instantaneous input voltage to approximately half of the peak value each cycle. Such excessive ripple was deemed unnecessary and is expected to negatively impact overall efficiency." Increasing the capacitor size felt like a safer bet for the same purpose but thank you for the perspective anyway.

Why do you think it will reduce efficiency? Did you take measurements? NCL30076 controls the current, and lower voltage will only reduce the frequency.

[Prince Charming]

@MariuszD

I see, that's the case for your proposal. But in my proposal the buck side is separated with a diode, and it has its own input capacitor, so the capacitor parallel to D7 might not be necessary for my version.

I thought lower voltage meant higher current which automatically means higher losses. I might be thinking too basic. I know the power levels here is too low to make comparison of the methods worthy, I am just talking about the theory. The bigger reason why I avoided it is my lack of experience tbh, more components more points of failure, more optimization. I'm sure it is totally a valid design; I am not against it and would consider it if one day I am faced with a passive power factor correction that's actually necessary.

[lichurbagan]

Thank you. I also made a small light for reading in the dark. I am using it regularly but I think my work is still far from perfect.
https://www.eevblog.com/forum/3d-printing/book-light/msg6301182/#msg6301182
Your tutorial may give me some guideline too. Thanks for the detailed explanation.