Author Topic: Finished Digital Clock Design  (Read 14228 times)

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Offline ChrisGreece52Topic starter

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Re: Finished Digital Clock Design
« Reply #25 on: August 19, 2016, 11:28:08 am »
Looks like a lot of fun. A good exercise would be implementing the same thing with an FPGA. One of the first projects I did with an FPGA was implement an alarm clock using RTOS. Great learning experience.
As i said after the original TTL project is finished i will be implementing it into an FPGA ;D
 

Offline ChrisGreece52Topic starter

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Re: Finished Digital Clock Design
« Reply #26 on: August 19, 2016, 11:34:20 am »
Nice project!  :-+

Why hand drawn schematic?
Its easier for me to draw the schematic by hand instead of making it digitally ... i love to write and erase stuff with a pencil.

That's not a fault of "digital" software but the clumsy counter intuitive implementation of it. With modern schematic entry software you are more or less enforced to draw a net list directly, not a decent schematic. And it's almost impossible, or at least cumbersome, to "sketch". And sketching is an important part of the process to evolute ideas into real working things.

Funny enough there is a schematic software package that do this almost right. It is 30 years old and did not change much over that time! It was almost right done the first time. It's called DesignWorks. There is still a active site about it: http://designworkssolutions.com/  It was originally written for the Mac, so maybe that's the cause not many EE's know about it. I myself use it still daily as a schematic entry front end for Altium PCB.

I looked into it and i have to say it looks good i submitted a demo request but i could not buy the whole software because i cannot afford it.If there are free student versions i am willing to download them though :P
 

Offline Pjotr

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Re: Finished Digital Clock Design
« Reply #27 on: August 19, 2016, 11:37:30 am »
Looks like a lot of fun. A good exercise would be implementing the same thing with an FPGA. One of the first projects I did with an FPGA was implement an alarm clock using RTOS. Great learning experience.
As i said after the original TTL project is finished i will be implementing it into an FPGA ;D

Don't do it. FPGA's run a lot faster so you time will pass by a lot faster  >:D

About DesignWorks: I don't know the status of it at the moment and if it is still active sold. It seems not maintained for the last 10 years.
« Last Edit: August 19, 2016, 11:43:35 am by Pjotr »
 

Offline ChrisGreece52Topic starter

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Re: Finished Digital Clock Design
« Reply #28 on: August 19, 2016, 11:41:26 am »
Looks like a lot of fun. A good exercise would be implementing the same thing with an FPGA. One of the first projects I did with an FPGA was implement an alarm clock using RTOS. Great learning experience.
As i said after the original TTL project is finished i will be implementing it into an FPGA ;D
Don't do it. PFGA's run a lot faster so you time will pass by a lot faster  >:D
I have not even looked at an FPGA yet so i cant tell but anyway i will find a way to overcome the problems that will occur as i did with this project :)
 


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