Ground Plane vs Star Ground/Power

[Icarus]

Hi Folks;
I'm going to make a 6-8 layer mixed signal pcb. It contains one DSP and 6 half-bridge driver. (10kHz max)
Should I use star ground or ground/power plane ? My instinc says "Go with the ground plane" but some datasheets indicates that i shoud not.
I'm a little bit confused here

[mikeselectricstuff]

Depends entirely on your requirements. A groundplane will generally have the lowest impedance, but you need to look at any heavy current/noisy return paths and if necessary isolate them from more sensitive circuitry using slots or cutouts in the plane(s)

[bookaboo]

You will want as much physical separation on the board as possible too (helps avoid radiated emf). So then you can ground plane the sensitive electronics together, then a separate nice fat trace over to the power components.

[Rerouter]

around the DSP and similar high speed comms, try and maintain an unbroken ground plane to keep impedance's matching, tie this plane back to the driver stages ground close to the ground reference point (generally power supply stage) this minimizes ground bounce and your signals will be happier (gaps in the ground plane under a moderate speed signal can cause some nasty issues at really high switching speeds)

for the high current drivers, either is up to you, your frequency is low but the switching speeds will be fast, so some HF wizardry may come into play a bit, but in general i would say run a big fat ground trace with any moderate impedance signal traces crossing it running perpendicular until passing a certain distance this allows you to keep it isolated back to the power supply stage,

[Icarus]

Rerouter, bookaboo, mikeselectricstuff, you have my sincere gratitude

[nctnico]

I'd start with making a diagram of the ground of the circuit. You should avoid mixing high current and low current paths. On the other hand a ground plane should be solid. No islands, slots or whatever because they can become HF resonators and may cause EMC problems. If your DSP runs at 1 GHz then the EMC tests say emissions must be measured up to 6GHz.

Usually it is a good idea to have the power electronics close to the power and output connectors and put the digital part on the far side of the board.

Remember: electricity flows in a loop. If you have a high current from the supply into a part then there is a similar high current flowing through the ground. Decoupling using ceramic and low ESR electrolytics help to prevent high currents to run allover the board. Ferrite beads are also very useful to block noise on supply lines.

[free_electron]

Slots in ground planes should be shunted using a small capacitor of a few hundred picofarad.

[qno]

It is not so much the ground plane. Its the current path.
When the current runs in a track a ground plane should be under it for the return path.
Then the stray fields are minimised and you can  run mV signas quite close to 30 A switching currents.

Last PCB I made did have a slot in the ground plane. It made things worse.
Removed it and there was no problem with CE certification.

Star point ground on a PCB is a relic from the single side and double sided board era.

[Icarus]

Thank y'all

[nctnico]

I like to model high frequency currents according to the picture below. The top picture shows a topology where a load can pull its high frequency current from any decoupling capacitor causing high frequency currents to flow in all the supply and ground traces. The bottom picture shows the situation with a ferrite bead or inductor in series with the supply. The load can only pull its high frequency current from the local decoupling capacitor because the high frequency current is blocked by the ferrite bead / inductor. Because electricity flows in a loop the ground current is also contained. In other words if you place a ferrite bead or inductor in series with a supply line you can also control the high frequency current through the ground.

[ConKbot]

I like to model high frequency currents according to the picture below. The top picture shows a topology where a load can pull its high frequency current from any decoupling capacitor causing high frequency currents to flow in all the supply and ground traces. The bottom picture shows the situation with a ferrite bead or inductor in series with the supply. The load can only pull its high frequency current from the local decoupling capacitor because the high frequency current is blocked by the ferrite bead / inductor. Because electricity flows in a loop the ground current is also contained. In other words if you place a ferrite bead or inductor in series with a supply line you can also control the high frequency current through the ground.

You may not even need to add a ferrite/inductor to add enough inductance,  proper layout of a decoupling capacitor would have power coming from your bus/plane, though a trace, and the trace should run though your decoupling cap pad.  Not be tee'd into the pad, etc.



the english is kind of broken but the point is made.

[free_electron]

That picture is more easysdummed up in the following rule:
Source, to cap, to load. The electrons have to hit the capacitor first, then th capacitor supplies the load.

Even the number of vias, and how you stript hem on the pads has an impact.
There are now special capacitors where the internal structure is assymetrical. Youhave to be careful not to turn the part upside down. If you were to make a crosscut of the capacitor you would see the electrodes sit closer to the surface of the board than towrd the other side. This is done to shorten the electrical length and esl. Some even use double stacking.

Other tricks like x2y structures then force the electron flow throughtche plates.
Once you are dealing with very fast edges and pulse loads stuff gets complicated very quickly

[ConKbot]

That picture is more easysdummed up in the following rule:
Source, to cap, to load. The electrons have to hit the capacitor first, then th capacitor supplies the load.

Even the number of vias, and how you stript hem on the pads has an impact.
There are now special capacitors where the internal structure is assymetrical. Youhave to be careful not to turn the part upside down. If you were to make a crosscut of the capacitor you would see the electrodes sit closer to the surface of the board than towrd the other side. This is done to shorten the electrical length and esl. Some even use double stacking.

Other tricks like x2y structures then force the electron flow throughtche plates.
Once you are dealing with very fast edges and pulse loads stuff gets complicated very quickly

I just used a bunch of X2Y caps for the input capacitors on a 20A, 1 MHz synchronous buck converter layout.  Interesting concept/idea. I'm using some of the larger package ones , so 12 vias per device. Though I'll be hand assembling all of them so I could have just put the vias in the pad now that I think of it.   I managed to avoid electrolytics and tantalums for the input caps.  Some electrolytics used on the output, but not untill after the output trace passes by ~40-50 uF of ceramics.


Though I'm sure a 1.2v core FPGA drawing 60+A  is even more 'interesting' to decouple.

[TerraHertz]

Another thing to bear in mind, is that presumably your half-bridge drivers are connected by wires to something off-board. And so the wires become receiving antennas as well as transmitters. Same with the ground return wires to the external devices. These can all pick up spikes large enough to glitch logic, when propagated through ground planes under logic ICs.

If you want a truly reliable device, it's best to have two separate ground-power plane pairs. One for all the internal logic. This doesn't connect to anything off-board apart from the power supply (and that via RF filters.) And as others have mentioned, no slots, islands, current loops, etc, or you're making a transmitter.

All external I/O goes on another section of the board, with its own planes. You can still run this from the same power supply, but the decoupling should be much lower pass, and inductors, etc designed to take the expected currents. Decouple ALL  the supply and ground rails, equally. The only connection between the logic and I/O plane areas should be at the one point the rails are joined via low pass filters.

The idea is that you are expecting the I/O circuit rails to be bouncing up and down quite a bit (relative to the logic planes), due to external noise pickup, drive current loops, etc.

Then for logic signals between the two areas, you have to provide some electrically isolated paths. There are many ways. You can use an optocoupler per signal, or some form of serial bus with only two or three optos, or signal transformer coupling, or whatever. Method depends on your required bandwidth.
It's best if there is no 'state memory' at all in the entire semi-floating I/O section. Since that whole plane is expected to be quite noisy, and the purpose of the exercise was to avoid logic glitches having any effect on operation.
This does mean that the serial I/O bus decoupling method is risky, since that implies state memory.

[codeboy2k]

...You have to be careful not to turn the part upside down.

OMG! WTF! GAG ME WITH A SPOON    the electrons really do, finally (!) fall out

[free_electron]

...You have to be careful not to turn the part upside down.

OMG! WTF! GAG ME WITH A SPOON    the electrons really do, finally (!) fall out

yep. due to the internal assymetrical mechanical construction they need otbe mounted correctly

these caps have a marker dot on the BOTTOM. so the pick and place can verify using its up looking camera that it has the part in the correct orientation in the nozzle.

Samsung and TDK have such parts. they are typically 0402 and 0201 intended for cell phone , smart phone and table power rail decoupling. we use em to decouple the channel controller in harddisks.

[Icarus]

Thank you all I'll keep in mind all of it

[SArepairman]

So, does this mean that if I am making a double layer board with through hole parts that putting the SMD decoupling capacitors on the bottom of the board (ground plane) is a bad idea? Since the electrons go to the part first and then the capacitor?

Is it better to connect the capacitor before the part through a via to the bottom of the board rather then to use the convenient leg of the DIP package? At what frequencies does the inductance of the lead begin to have a significant effect?

Wouldn't it be best to have the ground plane on the top side for the shortest path to decoupling?

[mrflibble]

Slots in ground planes should be shunted using a small capacitor of a few hundred picofarad.

Do you maybe have a picture of an example layout showing this? Also, what's the function of the capacitor here? Wouldn't this allow high frequency noise to pass through, albeit attenuated?

[codeboy2k]

That picture is more easysdummed up in the following rule:
Source, to cap, to load. The electrons have to hit the capacitor first, then th capacitor supplies the load.

And the rule is way easy to remember if you just think on the macroscopic scale -- this is exactly how every PSU is wired...
 
AC->transformer->rectifier->[BIG ASS SMOOTHING CAPS]->regulator->[SMALLER CAPS]-> LOAD

When your load is a board with smaller point loads, then you just fan out and follow the same flow, as FE pointed out, source, to cap, to load.

[underwurlde]

Glad to see that the majority here are suggesting good solid ground planes and grouping of associated components!

Thank God for that. Forum members....     

I see 'high-end' audio kit still wired up using 'star-pointed' laced wiring of expensive / exotic off-PCB components and horrible single layer 1oz PCBs also using 'star-pointed' routing. Yep, looks 'pretty' but all I see is inductance, stray capacitance and c urrent loops everywhere. Christ on a bike! Makes my bloody blood bloody boil blood-well beyond bloody belief!

LOL

A