Is it possible to simulate an Ethernet Phy using a microprocessor and SW?

[cdev]

With the caveat that I am just speaking out my ass so to speak and know nothing about the actual hardware besides some very basic things, I am just wondering if microprocessors, as they get faster, could be programmed to emulate their own cheap Ethernet cards as well. Maybe just 10-Base-T or 100 Base T

 I ask because ethernet PHYs are still relatively expensive, it seems, at least to the end user- running a few bucks a pop,

I am wondering if the Ethernet hardware could be replaced by emulated hardware inside of a microprocessor, maybe with the addition of the appropriate balun/transformers?

For example, the STM32.

Assuming you already had transformers, lets say, from old PCI network cards or obsolete DSL modems and other hardware that you no longer used because power economy, etc.

That way you get some more use out of old Ethernet cards.

[tszaboo]

The transformers can be ghetto replaced with capacitors. Like this:
http://www.ti.com/lit/an/snla088a/snla088a.pdf
Or just use a magjack.

Otherwise, ethernet is not that standard with the 8/10b encoding, so you probably need to bit bang it. I guess 10 mbit is possible. Maybe having something like a psoc would help. I cannot believe this, but this is the first time in my life I found psoc to be good for something.

If you search "ethernet bitbang" there are actually some results. Like with a simple AVR. Only sending though.

But then again, a ENC28J60 board is two dollar, delivered. And adding an ESP8266 module is cheaper than the ethernet cable.

[cdev]

Yes, thats what I was wondering.. bit banging Ethernet.

[donmr]

What speed to you want it to run at, 10Mbps, 100Mbps, 1Gbps, 10Gbps...?

The main function of the Phy is to be a high speed parallel to serial converter to get the data rate higher.
Very few microprocessors could bit-bang at those speeds.

[cdev]

10 MBps would be more than enough.

[bson]

You can emulate the various xMII interfaces if that's what you're wondering.  But, why bother when you can simply use the real deal?  It's much easier and a lot more useful.  xMII is also super easy, so if you have signal integrity (easily verified with a sufficiently fast scope with an active differential probe) the rest is a software project pretty much.

[Kjelt]

I am not convinced a regular uC can do this, Tx perhaps, Rx no way.
Look at the datasheet of a Phy chip what it takes care of, collision detection, analog+mlt3+Nrz(i) decoding , how many times do you need to oversample? etc.
Then experiencing an STM32 with MAC and ip stack and tls stack only getting 10Mbps with extreme difficulty, naah forget it.
Another thing not to forget is that the incoming signal might be messy, lot of noise, ESD, voltage offset, if this would be so easy why do we still use RS485 interface chips in our devices? They only run at 1Mbps ?

[BrianHG]

Emulating a PHY with an MCU means you will be missing the cable length equalizer.  Without this, your data will crap up after a meter or 2 of cable and will be sensitive to drive characteristics of the device your are connecting to.  Adding the necessary equalization receive amplifier and drive amplifier to connect to 2 data pins on your MCU will end up using more parts and be more expensive than a cheap PHY which has all of this circuitry internally and it's drive characteristics will pass FCC.

[cdev]

Thank you all. Even though the set of protocols which can be "bit banged" seems to be increasing, the technical and economic issues are still large enough to make it not such a good solution most of the time. Which is of course why they are rarely the default or even a reasonable approach to solving some problem.

. I was mostly asking because I am kind of interested generally in technology and resource constrained situations and networking is something we pretty much now depend upon..

[DBecker]

When Gigabit Ethernet was introduced, the PHY typically had far more compute power(*)  than the PC in which it was installed.

* By a misleading comparison of DSP ops to general purpose CPU ops.

A PHY is also putting out a carefully-shaped analog signal, sometimes while simultaneously receiving on the same signal line/pair.  You aren't going to be able to do that with bit-banging a digital output.

[NorthGuy]

At any rate, real PHY will be much cheaper than anything else.

[mrpackethead]

LAN8720, abotu $0.70c 

there is a PIC micro that ( 18Fxxxx ) that has a Phy built in as well.     

[cdev]

I can see that its unlikely bit banging could make up for DSP in this context anytime soon. Bit-banging is still kind of interesting. I cant help but wonder where we will be in another decade or so with bit banging generally.


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Quote from: DBecker on Today at 18:47:50

When Gigabit Ethernet was introduced, the PHY typically had far more compute power(*)  than the PC in which it was installed.

* By a misleading comparison of DSP ops to general purpose CPU ops.

A PHY is also putting out a carefully-shaped analog signal, sometimes while simultaneously receiving on the same signal line/pair.  You aren't going to be able to do that with bit-banging a digital output.

[amyk]

Yes.

https://hackaday.com/2014/08/29/bit-banging-ethernet-on-an-attiny85/

Also, https://wwwhome.ewi.utwente.nl/~ptdeboer/ham/avreth/