Looking for recommendations: fast 50 Ω TTL pulse-output driver

[Smile2016]

I'm looking for a fast pulse-output stage driven by a 3.3 V CMOS FPGA, for a rear-panel BNC on a test instrument.

My Requirements:

Input: 0–3.3 V CMOS from FPGA
Pulse width: 10 ns to 2 s, 10 ns increments
Output: TTL-compatible into 50 Ω
Rise/fall time: ~2 ns
Supply:  +5.00 V [or 15V available ]
Connector: rear-panel BNC

I do not need a real 5 V across the terminated 50 Ω load. A conventional 50 Ω source-terminated output is fine:
~5 V driver ── 50 Ω ── BNC ── 50 Ω load ≈2.5 V HIGH
This requires roughly 50 mA drive, while providing ~5 V into high-Z and ~2.5 V into 50 Ω.

The FPGA generates all pulse timing; the output stage only needs to preserve the 10 ns minimum pulse width and ~2 ns edges.

ICs currently being considered, have them around:

SN74LVC1G126  simple and fast, but 3.3 V input level compatibility is an issue when powered from 5 V ??
TLV3601  very fast comparator can define ~1.65 V input threshold, maybe hysteresis but likely insufficient current for directly driving the 50 Ω source-terminated output.

I'm also curious  about modern single-channel IC or simple topology capable of approximately 50–60 mA at 5 V with ~1–2 ns edges

Since this is an exposed rear-panel BNC, ESD, short-circuit and accidental external-voltage protection are also "required" without significantly degrading the edge rate.

Any recommendations for a suitable driver IC or proven topology? such as 1PPS drivers around here but nicer Cheers !

[moffy]

I've used the 74ALVC14 for sending a 50MHz square wave, differentially, down 50 meters of CAT5. If you used one of the 6 inverters to drive the other 5 in parallel it should work and maintain phase.

[langwadt]

https://www.ti.com/product/SN74ACT17  ?

[Smile2016]

Not sure the 74ALVC14 will handle TTL levels properly.  It’s almost there.... I’d also need to daisy-chain two stages since I don’t want the signal inverted. it is an instrument pulse output ... I do not control the polarity....

[Smile2016]

Interesting device, the 74ACT17. I’m no longer sure I really need those ~2 ns fast transition times. The ACT17 may actually work, I can’t determine the output rise/fall times clearly from the datasheet.

[MarkF]

Have you seen this:

  https://www.eevblog.com/forum/projects/compact-74ac14-pulse-generator-pcb/

You would have to check that 3.3V will trigger the input.

[langwadt]

Not sure the 74ALVC14 will handle TTL levels properly.  It’s almost there.... I’d also need to daisy-chain two stages since I don’t want the signal inverted. it is an instrument pulse output ... I do not control the polarity....

 74ALVC is 3.3V only, you need something with either a "T" for ttl or dual supply, to get both 5V output and 3.3V compatible input

[Terry Bites]

Clock buffers?

The lore says you cant parallel up logic outputs for more current even if you're sensible and sum them resistively.
The risk of jitter is high, but what if that level of jitter is acceptable?
I've seen the lore broke and been gotten away with many times, I'd say its worth a punt.

[Andree Henkel]

real 5V across the terminated load is not TTL, and it cannot be done with 5V driver supply
TTL is >=2V at the 50Ohm terminated load, that can be done with 5V driver voltage, even if there is 50Ohm source resistor

to get 5V across 50Ohm term you need > 10V if you also source terminate with 50Ohm, with your 15V there should be a way

[mtwieg]

The AHCT logic family works well for converting 3.3V to 5V. But when loaded the actual output swing will be decreased. For example a single buffer (SN74AHCT1G125) will swing within 0.1V of either rail with light load (<50uA), but with a load of 8mA might only get within 0.5V of either rail. So you would need to stack many in parallel (maybe ten or so).

[Smile2016]

real 5V across the terminated load is not TTL, and it cannot be done with 5V driver supply
TTL is >=2V at the 50Ohm terminated load, that can be done with 5V driver voltage, even if there is 50Ohm source resistor

to get 5V across 50Ohm term you need > 10V if you also source terminate with 50Ohm, with your 15V there should be a way

mentionet initially : "I do not need a real 5 V across the terminated 50 Ω load. A conventional 50 Ω source-terminated output is fine:
~5 V driver ── 50 Ω ── BNC ── 50 Ω load ≈2.5 V HIGH
This requires roughly 50 mA drive, while providing ~5 V into high-Z and ~2.5 V into 50 Ω."

[David Hess]

The 74LVC125A is my go-to fastest 5 volt part for general purpose interfacing.  The 3-state output can be used as a push-pull output, or a pull-up or pull-down open drain output.  Unfortunately it is probably not going to work well with a 3.3 volt input while supplied by 5 volts unless you do something exotic, so my next choice is the 74ACT125 which will accept 3.3 volt logic and produce a 5 volt output

The exotic thing to do is operate a 74LVC125A with a 3.3 volt supply so that its input will accept 3.3 volt logic, and then use it to drive the emitter of a bipolar transistor on the output to do a 5 volt level shift with a 5 volt pull-up.  This will produce an incredibly fast output, and one of the reasons I morn the loss of fast PNP bipolar transistors.

In the past, 50 ohm line driver TTL parts like the 74AS140 and 74F140 would have been my choice.

[ConKbot]

SN74LXC1T14 looks silly fast, supports 32mA outputs (parallel 2 and use 100 ohm series term on each so your BNC sees an effective 50 ohm output impedance)  and has independent power supplies, with good behavior when partially powered. Schmitt trigger input could be a bit messy with the logic state not matching if your input signal is slow, but most FPGA outputs are annoyingly fast,even on slow slew rates, so just route your transmission line well to not make a ringy mess going into the pair.