Author Topic: Low-Voltage/Noise Sensor Signal Conditioning Design Question  (Read 1075 times)

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Offline Evan.CornellTopic starter

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Low-Voltage/Noise Sensor Signal Conditioning Design Question
« on: April 26, 2019, 04:55:13 pm »
I have a sensor that has an expected output voltage of 1Vrms on max desired signal strength down to ~30nVrms at the low end of sensitivity. This is a signal range of ~150dB. My end-client would like to be able to digitize the low end of sensitivity at ENOB=10.

My ADC is 24-bit, with a maximum differential input of 5Vpp (+-1.25V on each input pin). The noise floor voltage level at the ADC input is ~11uVrms (based on SNR specification in datasheet).

I am already planning to have two ADC stages, one with low gain to handle the highest input voltage range, and another with high gain to handle the lowest input voltage range. The signals will then be selected/combined in software, depending on the received signal strength.

Two questions:

1. If the noise floor voltage at ADC input is 11uVrms and ADC ENOB at that operating point is 18bits, how do I calculate gain of signal conditioning to get input signal of 30nVrms to be digitized at ENOB=10?

2. How do I specify the low-noise amplifier(s) to ensure the desired ENOB=10? Or are the specs I'm trying to meet unrealizable with currently available devices?
 

Offline OM222O

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #1 on: April 26, 2019, 06:26:27 pm »
your ADC seems to be wrong for this application. I can recommend the ADS1219 which has a built in gain stage (x1 or x4) and has a built in 2.048v reference which you can substitute for an external one to match your range. if you want to make a low noise amplifier, create a second order active filter (or combine multiple stages of second order filters for even better results).I'm not sure what your application is but you can daisy chain high pass and low pass filters based on your operating frequency range to minimize your noise. if you care about offset as well, either use a chopper amp or add an inverting stage with some DC offset to correct for that. I can't design an amplifier stage as you haven't provided enough details.
 

Offline jonroger

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #2 on: April 26, 2019, 06:36:49 pm »
You need 25 bits just for 30nV to 1V and then another 10 bits.   So 35 bits (without simplifications).   Good luck with that.  Or considering only the low end - you want noise of .03 nV or less.   Not going to happen even with a pre-amp.
« Last Edit: April 26, 2019, 06:43:57 pm by jonroger »
I am available for custom hardware/firmware development.
 

Offline Gibson486

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #3 on: April 26, 2019, 06:39:45 pm »
If I understand correctly, you want to measure down to around 32 nV with 10 bits resolution? The 10 bit resolution should be easy, but measuring down to 32nV will hard, especially with the ADC your describes. As OM222O pointed out, you can use an ADC with built in "gain" (it's not really gain). You will want to keep the differential signal as much as possible. This means no op amps and go directly into the ADC.  If you have to use op amps for gain, the problem becomes much harder because you are now dealing with the noise from the source AND the op amp. You will see lots of people advise not to use choppers for this application. I can neither confirm or deny it will work, but there seems to be a lot of conflicting reports.
 

Offline OM222O

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #4 on: April 26, 2019, 06:40:16 pm »
You need 25 bits just for 30nV to 1V and then another 10 bits.   So 35 bits.   Good luck with that.
that is exactly why I specifically mentioned use of an amplifier circuit with filters BEFORE the ADC which can add another additional x4 gain stage :)
 

Offline OM222O

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #5 on: April 26, 2019, 06:45:11 pm »
If I understand correctly, you want to measure down to around 32 nV with 10 bits resolution? The 10 bit resolution should be easy, but measuring down to 32nV will hard, especially with the ADC your describes. As OM222O pointed out, you can use an ADC with built in "gain" (it's not really gain). You will want to keep the differential signal as much as possible. This means no op amps and go directly into the ADC.  If you have to use op amps for gain, the problem becomes much harder because you are now dealing with the noise from the source AND the op amp. You will see lots of people advise not to use choppers for this application. I can neither confirm or deny it will work, but there seems to be a lot of conflicting reports.

I do agree ... it just seems odd and I would question the sensor design which operates down to 32nv? there is no information provided. if he uses choppers, the offset will be ok but there will be noise. if he uses low noise amps then there would be low noise but bad offset ... so it seems rather difficult, especially with differential noise being a factor when he uses op amps if not using instrumentation amplifier with differential output (which I'm not even sure it exists?)
I would consider re designing your sensor, or at least its output stage to get rid of these weird values.
 

Offline Evan.CornellTopic starter

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #6 on: April 26, 2019, 06:57:08 pm »
You need 25 bits just for 30nV to 1V and then another 10 bits.   So 35 bits (without simplifications).   Good luck with that.  Or considering only the low end - you want noise of .03 nV or less.   Not going to happen even with a pre-amp.

This is why I'd have 2 ADCs per sensor to achieve the desired dynamic range. I know I'm not going to get it all with one ADC.

I think your point about the required noise introduced by op-amps on the low-input signal (30nV / 2^10= 0.03nV noise) is the show-stopper here. A preliminary scan of Analog Devices' low-noise op-amp list shows 850pV/rt(Hz) as the lowest voltage noise density device option.

The idea of this question was to verify that the end-client's 10-bit resolution requirement at the low end of the signal amplitude range was not feasible. And I think we've arrived at that conclusion. Either we need a sensor that has a higher output voltage at the low range, or the resolution requirement needs to be relaxed in order to be able to use amplifiers that are currently available today.
 

Offline OM222O

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #7 on: April 26, 2019, 07:01:31 pm »
I'm not even sure what you mean by 2ADCs? you can't just parallel them to get double the resolution for example?  :palm:

and yes, the sensor output definitely needs to be modified as it's highly unreasonable to expect any sort of resolution when your signal is just 32nV!
 

Offline Gibson486

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #8 on: April 26, 2019, 07:01:39 pm »
You need 25 bits just for 30nV to 1V and then another 10 bits.   So 35 bits (without simplifications).   Good luck with that.  Or considering only the low end - you want noise of .03 nV or less.   Not going to happen even with a pre-amp.

This is why I'd have 2 ADCs per sensor to achieve the desired dynamic range. I know I'm not going to get it all with one ADC.

I think your point about the required noise introduced by op-amps on the low-input signal (30nV / 2^10= 0.03nV noise) is the show-stopper here. A preliminary scan of Analog Devices' low-noise op-amp list shows 850pV/rt(Hz) as the lowest voltage noise density device option.

The idea of this question was to verify that the end-client's 10-bit resolution requirement at the low end of the signal amplitude range was not feasible. And I think we've arrived at that conclusion. Either we need a sensor that has a higher output voltage at the low range, or the resolution requirement needs to be relaxed in order to be able to use amplifiers that are currently available today.

More importantly, I would question if the sensor can even resolve that consistently and if at all.
 

Offline Evan.CornellTopic starter

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #9 on: April 26, 2019, 07:03:59 pm »
I'm not even sure what you mean by 2ADCs? you can't just parallel them to get double the resolution for example?  :palm:

and yes, the sensor output definitely needs to be modified as it's highly unreasonable to expect any sort of resolution when your signal is just 32nV!

No, ADCs wouldn't be paralleled. I would just digitize both channels, and depending on detected signal strength, choose one set of samples over the other, during post-processing, after sample acquisition.

Thanks for the feedback!
 

Offline DaJMasta

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #10 on: April 26, 2019, 07:25:14 pm »
If you just need dynamic range and you don't need resolution across the whole range, you can use multiple ADCs, one as a high gain low level stage that just clips and is ignored in software at some point, and one as a more general level (you're only ever going to get one ADC's worth of resolution, but you can run both ranges in parallel giving your wider input dynamic range), I think that's what the OP is describing at least.

That said, the point about having to resolve 30pV steps on the lowest range really is going to be a technical feat.  Sure, you can get low noise opamps below 1nV*sqrt(Hz), but that's only one part of the system.  Unless your sensor can actually source some current stably at that low level, you're going to need a very high input impedance on your first stage, which comes with thermal noise issues, then you have the current noise from the gain settings of that first amp, which will probably have to be a pretty high gain one because of the extremely low signal level.  And you're going to run into all sorts of measurement issues because your proposed noise floor is so low.  For such a low level circuit you need to consider excessive shielding/isolation from RF and mains noise to be a necessity (and powerline cycle compensation if not requiring battery operation all together), you're going to need the lowest leakage input frontend you can manage (no solder resist, active guards, maybe standoffs), you're going to need some really low noise front end amplifiers, similarly low noise feedback resistors (probably metal foil), and cryogenic cooling of the frontend is a likely requirement to achieve such high resolution at that signal level.  Averaging is probably mandatory to get a final result with any stability within 30pV steps, so don't expect a high system bandwidth or quick response time.

Not really sure if it's even feasible, maybe worth trying to measure the sensor with a lock in amplifier to try and resolve what the lowest needed measurement level actually is necessary, because I can't think of a sensor that can provide meaningful information over that dynamic range and to that tiny output level.
 

Offline David Hess

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Re: Low-Voltage/Noise Sensor Signal Conditioning Design Question
« Reply #11 on: April 27, 2019, 03:45:32 am »
... down to ~30nVrms at the low end of sensitivity.

My end-client would like to be able to digitize the low end of sensitivity at ENOB=10.

We really need to know the bandwidth you are interested in to make sense of the RMS noise specification.  See below.

Quote
1. If the noise floor voltage at ADC input is 11uVrms and ADC ENOB at that operating point is 18bits, how do I calculate gain of signal conditioning to get input signal of 30nVrms to be digitized at ENOB=10?

There are probably better ways to do it but roughly, each bit is worth 6 dB so 10 bits is 60 dB or 1000 times.  (1) 1000 times 11uVrms is 11mVrms.

Quote
2. How do I specify the low-noise amplifier(s) to ensure the desired ENOB=10? Or are the specs I'm trying to meet unrealizable with currently available devices?

If I understand your 30nVrms requirement correctly, this will be somewhere between soul selling and impossible if done in a straightforward way.  Common nanovoltmeters can get down to a noise of perhaps 10nVrms at DC and 1nVrms with chopping.

If you application is suitable for a lock-in amplifier, then that is the way to go but I do not think even that will give you 10 bits of resolution with a 30nVrms input.  Lock-in amplifiers allows for measurements to be made with very narrow bandwidths reducing noise.

(1) 20 dB is 10 times.  Decibles add so 60 dB is 20 dB + 20 dB + 20 dB or 10 x 10 x 10 = 1000 times.
 


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