Nano Voltmeter

[azeeman]

By using some simple mathematical tricks it's possible to make simple voltmeter with nanovolt resolution using a Nano, a dual op-amp and some passive components.
The first axiom is that the average value of a sinewave over one period is zero.
The second axiom is that the average value of all a sinewave's harmonics over the fundamental period is also zero.
The third axiom is that the average value of noise is zero.
This is very important and often forgotten. Noise cannot generate a DC value as long as it is not strong enough to cause non-linearities.
The only way noise can generate a DC value is if it interacts with a power source in a non-linear fashion.
Noise can be reduced by low pass filtering. This filtering can be implemented by simple averaging or other methods to reduce bandwidth.
Another important fact is that a modern CMOS op-amp input offset is quite stable with a relatively low temperature coefficient.
For example, the MCP601 has offset drift of 2.5uV/degree C. The op-amp itself uses very little power so if ambient temperature can
be held relatively constant, it's easy to make precise voltage measurements.
The simplest high precision voltage divider is a PWM provided that the correct components are used and the operating frequency is properly selected.
The most critical part of the PWM is the filter capacitor which has an optimal value of 330nF.
This number is not mathematically derived, instead it comes directly from the capacitor specification.
https://yageogroup.com/content/datasheet/asset/file/KEM_F3106_R75
Capacitance values of 330nF or less are rated at >= 100,000 MOhms with a typical value of >= 500,000 MOhms.
Going to a larger capacitance value will proportionately reduce the insulation resistance because of the increased insulation area.
This will cause a greater loading error without giving any real benefits.
To keep PWM precision as high as possible, the filter resistor should be relatively small compared to the capacitor insulation resistance.
If a 1MOhm resistor is used, the output error will be 1M /(100,000M + 1M) which is roughly 10 parts per million at worst.
If the PWM reference voltage is 5V, the maximum error is 50uV with a typical error of 5uV.
This gives a filter time constant of 1M * 330nF = 330ms which is suitable for over 16 bits of resolution with the correct PWM fundamental frequency.
There is an advantage to reducing the filter resistance provided that the switch driving the PWM has equally matched on resistance for the switch
going to the reference voltage and the switch going to ground. The actual switch on resistance value is not important, only the match.
If the reference voltage switch resistance is higher than the ground switch resistance, there will be a conversion error.
For example, assume the high switch resistance is 100 Ohms, the low switch resistance is 120 Ohms and the filter resistance is 1 MOhm.
The PWM output voltage at 50% duty cycle will have an error of 1 - (1M + 100R)/(1M + 120R) = 20 ppm. This is a conversion error and doesn't introduce
offset. When the duty cycle is set to 0, the PWM output will be zero. When the duty cycle is 100%, the PWM output will be 100%. It's only when the
duty cyle is at an interim value that the conversion error will be significant.
The second axiom above is used in determining the PWM fundamental frequency. If the measurement averaging period is an integer multiple of the PWM
fundamental frequency, the PWM ripple will effectively be nulled out.
If the measurement averaging period is an integer multiple of the power line frequency, power line interference will be nulled out.
The PWM operates in a simple feedback loop and needs to be synchronously controlled by the microprocessor. This limits both the minimum PWM bit width
and the maximum PWM duty cycle.
Based on the above, the PWM period is set to 1,000 clock cycles giving a fundamental frequency of 16kHz. The maximum duty cycle is limited to 90% giving 100 clock cycles
at the end of the PWM period for null detection and setting the next PWM duty cycle value.
If 4,000 PWM cycles are averaged, the averaging period will be 250ms which is 15, 60Hz power line cycles and 25, 50Hz power line cycles.
Interference from these sources will average to zero.
Although the PWM resolution is only 5mV per step, the PWM is extremely linear and interpolation between steps can be used to increase resolution.
Because the PWM filter is low pass, it is ideal for interpolation. The PWM output is restricted to one of the 1,000 available steps so there will be ripple on the
output reading, but because sampling is done at the PWM fundamental frequency, sufficient averaging of the output will reduce the ripple to an arbitrarily low value.
The third axiom applies here also. Prior to averaging, the PWM duty cycle setting value is very noisy because of PWM ripple and also thermal and other noise.
The PWM has no intrinsic offset so output nulling can be achieved down to nanovolt levels. But, extracting the average value to that kind of resolution requires averaging
over a substantial number of samples which takes a long time.
There is offset error from the op-amp and there are simple techniques to compensate for it such as switching the op-amp input between the PWM output and the input.
The input offset is then common to both voltages and is effectively cancelled out. Another trick is to use a PWM to generate an offset correction voltage, but this requires
a two bit null detector to both null out the offset and the input voltage.
The nulling algorithm is very simple. Wait until the PWM count is close to the end and then sample the null detector output and then set the PWM duty cycle one step higher
or one step lower depending on the output of the null detector.
Then, wait until the counter rolls over and then go back to the first step.
While waiting for the counter to finish, send out the accumulated duty cycle readings over the RS232 port.
Although single bit detection seems simple, it's very powerful because the rate of information flow is constrained to one bit per sample with the PWM output only able to
change by one step or less every period.
If the PWM quantization is 5mV and the fundamental frequency is 16kHz, the slew rate will be 5mV * 16kHz = 80 V/s.
Referring to https://www.electrical4u.com/slew-rate/, the bandwidth is calculated to be 80 / (2 * pi * 5) = 2.646Hz.
The bandwidth is programmable by simply increasing or decreasing the amount the PWM duty cycle changes each cycle. In practice, I've found that changing by only one bit
gives the best stability and responsiveness. A more advanced algorithm may be able to increase responsiveness.
Another advantage of single bit detection is that it acts as a noise limiter. Regardless of the noise at the detector input, it can only move the PWM output up or down
by one step. A noise peak of 1V has the same effect as a noise peak of 1uV, the PWM can only change by one step. This places a hard limit on the amount of noise fed back into
the null detector.
By cascading multiple op-amps the single bit detector, very fine quantization is possible without averaging. If the op-amp gain bandwidth is 1Mhz with two op-amps in cascade,
a 16kHz sampling frequency, and 1V digital input hysteresis, the quantization is 1 /(1MHz / 16kHz)^2 = 256uV. Because interpolation is used, actual quantization is much finer.
A third op-amp stage can be added which will increase resolution to 1 /(1MHz / 16kHz)^3 = 4.1uV.
A PWM is also use to bias the input of the null detector. This is done for two reasons. The first is that the PWM will very precisely set the input bias to half the reference
voltage. This is convenient, but more important is that the PWM runs at a high harmonic of the measuring PWM so that it's ripple will be nulled out. Also, because the PWM is
sampling the reference voltage, noise on the reference is mixed to a much higher frequency and will have less effect on the op-amp input.
The circuit as shown is intended only to demonstrate the use of a PWM in measurement as well as the principles of single bit detection. In many use cases, single bit detection
is much easier to implement than PID control and equally effective. The use of a PWM as a digital to analog controller is also well established. By combining the two techniques,
very high precision measurements are possible although the averaging times may be too long to be practical in some cases.
An alternative is to use the PWM as a calibration standard with a fixed duty cycle. It can the be used to calibrate a voltage divider following a conventional DAC. Because the null
detector can have quantization down to the nanovolt range, the output of the DAC voltage divider can be comparable to a low voltage input such as from a thermocouple.
By switching the null detector input between the thermocouple output and the DAC voltage divider output, the op-amp input offset is common to both measurements and cancels out.
The op-amp input offset will be essentially unchanged even down to the nanovolt level at modest switching rates allowing for high precision repeatable measurements.
The DAC voltage divider is calibrated by setting the PWM output at a value less than the DAC full range and then switch the null detector input between the PWM and DAC voltage
divider to precisely determine the voltage divider ratio. For example, if the DAC is divided down by 500, the DAC duty cycle would be set to 1/1000. The switching frequency
must be a subharmonic of the PWM fundamental such as 1kHz to null out the PWM ripple.
Ideally, the DAC readings would average to 0.5. Any deviation would primarily be caused by the divider resistors. This allows the use of moderate precision resistors and
commodity op-amps to make high precision measurements, although limited by the sampling frequency.
Charge injection by the analog switch will cause transient voltage spikes. High quality analog switches with extremely low charge injection are readily available which can
minimize this. Also, charge injection is mainly capacitively coupled, and depending on input source resistance and capacitance, will discharge quickly. By sampling the null
detector output as late as possible after the switch transition, the effect of charge injection can be greatly reduced.

[Alex Nikitin]

poor Yorick AI, SI!

 

Cheers

Alex

[negativ3]

Arithmetic attached to confidently stated unjustified engineering conclusions.

A wall of AI guesswork.

[azeeman]

Have you tried the circuit? It works well for me.

[azeeman]

I've been playing with the circuit some more and found some counter intuitive results. Reducing the PWM filter capacitance actually reduces quantization noise. Although If the capacitance is reduced to zero the circuit will fail to null.
A larger capacitance introduces greater delay in the feedback and also attenuates high frequency feedback causing greater quantization noise. A smaller capacitance will feedback more of the high frequencies, but if too small will prevent interpolation as there must be some charge and discharge time between samples.
When the filter capacitance is 470nF, the output of the null detector is a jittery square wave at around 45Hz. When the capacitance is reduced to 1nF, the null detector output is a jittery 360Hz with a much lower noise level. With a 10pF capacitor, the output consists of bursts of pulses with a repetition rate of around 1.14kHz with the pulses occurring at the sample rate of 16kHz.
With zero capacitance, the output of the null detector is just noise as it cannot respond quickly enough to changes in the PWM output.
The required amount of filtering is also dependent on the input amplitude. With a 10pF capacitor, an input of 20mV can be nulled while a higher input voltage such as 60mV is not nulled. With that input the output of the null detector is spikes at the sampling frequency. With a 1nF capacitor interpolation is present over the full input range.
This is good news because it greatly increases the measurement speed for a given resolution since much less averaging is required. Because of the harmonic relation between the PWM period and the averaging period, it looks like the PWM filter is only required as an analog memory for interpolation and is not required for filtering out PWM ripple.

[MariuszD]

Another post in a similar style.

What conclusions can be drawn from your posts? Usually, you analyze a simplified model of phenomena, so limitations seemingly do not exist.

In real engineering work, after developing the theoretical concept, implementation follows, and finally, measurements. So, checking what has actually been achieved and how much the adopted model deviates from reality. It is also important to compare with other methods. If you took on the challenge, showed what you managed to achieve, and explained which physical phenomena limited the possibilities of practical implementation, I would consider your post valuable.

Why do the best voltmeters from the top manufacturers have problems in the nV range, but your method doesn't? Because you never reached the verification stage.

I've been playing with the circuit some more and found some counter intuitive results. Reducing the PWM filter capacitance actually reduces quantization noise.

This is a step in the right direction; when building practical systems, we always encounter a discrepancy between our expectations and the system's behavior.

The third axiom is that the average value of noise is zero.

If you have an infinite time to study the phenomenon.
Repeating the same experiment multiple times in a finite period will yield a different result each time. Haven't you been interested in what the differences are between simplified theoretical models and real systems?

The fact that noise averages to zero does not result from physical phenomena but from the division we have adopted, where there is a component with an average of zero (noise) and one that is different from zero (drift). In electronic components, there are no separate physical phenomena that correspond to both components.

[azeeman]

I have a working circuit and am currently refining it. I've modified the PWM filter by putting a small 220pF capacitor in parallel with the 1M filter resistance with a 1nF capacitor to ground. This reduces the quantization noise significantly by increasing high frequency negative feedback without affecting the DC value. The output of the null detector is now trapezoidal presumably because of the increased capacitive loading and the changed negative feedback frequency response.
The only source of offset is the op-amp input offset and that is quite stable with temperature and time. Long integration times are not very practical for everyday use, but that's not the intent of the circuit, the main purpose of the PWM is to generate a stable low voltage for testing which it is quite successful at. The current iteration of the circuit is stable to about five digits of precision using a Korad power supply as a voltage source with an effective integration time of 1 second. The integration is done by summing 8,000 samples in the Nano followed by a moving average filter currently averaging over two samples.
By substantially increasing the number of samples, and by substantial, I mean a thousand or more times, the variation drops down to the nanovolt region while the long term average, such as over one day will vary around 100nV. The variation is temperature dependent since it is just a measurement of the op-amp offset and if run overnight, the average voltage will change appreciably when I enter the room and turn on the lights. Those measurements are done by using the bias PWM as the input since the Korad will not have the required stability and because the bias PWM shares the same reference voltage, the measurement will be ratiometric. The bias PWM is also run at a harmonic of the PWM frequency so it's ripple will also average to zero.
I realize that the kind of performance with such a simple is unheard of which is why I'm posting my results. Note that the readings are not of absolute voltage, but as a ratio of the reference voltage. Ratiometric measurements can be much more repeatable than absolute measurements because a lot of the error terms such as reference voltage drift are common mode and cancel out.
The PWM itself is digitally controlled which greatly reduces errors because even the crappy ceramic resonator on the Nano can have very low phase noise over the period of the PWM. The intent of the circuit is to use it where precise ratiometric measurements of low voltages are needed. One example is measuring load cell outputs where the load cell reference voltage is common with the measuring circuit. Another example is temperature measurement using an RTD. A PWM can be used in a feedback loop to control the RTD current with a second PWM or conventional DAC used for measurement. Both the RTD current and voltage across the RTD are fractional multiples of the reference voltage so absolute accuracy is not critical, but ratios are for which the PWM is the best solution.
The main problem with a PWM is the high output resistance. This is easily solved by using a CMOS unity gain op-amp as a buffer amplifier and then AC coupling it to the null detector. Detection is then done by comparing AC peak voltages. The AC coupling eliminates DC offset and the voltage can be translated up or down to match the detector input.
The null detector op-amp inputs require DC bias and even though the inputs are AC coupled, the op-amp input offset is still a problem. I have a potential solution where a PWM is used to null out the input offset such that both AC coupled inputs will have the same DC voltage value. This is still untested, but the success of the current circuit shows that offset nulling using a PWM is practical.
Null detection will be two bit giving four output states. Based on these states, it should be possible to determine if the input offset correction is too high or too low and also if the PWM or DAC used for measurement is too high or too low. For example if the peak positive and peak negative of one input relative to the other input are both high, the input offset is too high.
Another example would be if the peak positive and peak negative of one input relative to the other are both low, then the measurement PWM or DAC output is too low while the offset is close to null.
Replication of the current circuit is very simple and can be done at low cost and having others look at it would be great feedback in case I'm missing something. There is supporting mathematical theory behind the design which is also why I built the circuit. I want physical proof of theoretical results and so far theory and practice seem to match.
I've attached a printout of the circuit with the added changes.

[azeeman]

To demonstrate the effect that adding a capacitor across the PWM filter resistance, here are two oscilloscope screen captures. When no bypass capacitor is present, the output of the null detector is a low frequency square wave with transitions at the wave edges. This is the cause of significant low frequency quantization noise which is difficult to average out.
When the bypass capacitor is put across the resistor, the null detector output changes at the PWM frequency pushing all the quantization noise to a substantially higher frequency which is much easier to filter out.
The input voltage for these measurements is 3V from a Korad power supply. 8,000 samples are summed in the Nano and two sample moving average is applied by the Python script. The reading changes every 500 ms and is stable to the fourth digit. By increasing the the number of samples in the moving average, the reading variability can be arbitrarily reduced.
I've also attached a screenshot showing the Python script display.
Note that the circuit is a variation of the sigma-delta converter used in your computer sound card. The significant differences are that sigma-delta uses pulse density modulation and one to four bits of quantization with massive signal processing at high frequency and can easily resolve down to the microvolts. My circuit uses pulse width modulation with roughly 10 bit quantization and a trivial amount of signal processing. The processing speeds are also orders of magnitude different. The Nano clock runs at 16 MHz while sigma-delta runs at 100 MHz or more.
Sigma-delta is limited to about four bits for quantization as higher bit counts cause instability. There is no limit for the method I'm using other than practical limits on the PWM filter and the limited clock frequency available. There is still a lot of theoretical work to be done, but the simplicity and low cost of both the hardware and software makes this an approachable problem.
Another use for a PWM is in the feedback loop for a tracking positive and negative power supply. The PWM will run at high frequency with 50% duty cycle. The high input will be the positive power supply and the low input the negative power supply. The feedback op-amp would then compare the PWM output to ground and adjust the negative supply accordingly.
The PWM filter can be the dominant pole so it's easy to create a stable circuit, but the low pass nature of the feedback will cause significant high frequency noise. By adding the bypass resistor to modify the frequency response, the high frequency noise can be greatly attenuated. The tracking precision will be limited primarily by the op-amp input offset. If the difference voltage is 5V and the op-amp input offset is 500uV consistent with an MCP601 op-amp, the tracking error will be around 1 part per thousand or 0.01%. It's possible to do this with a resistive divider it just a question of which way is cheaper. Also, if a chopper stabilized op-amp is used, the input offset can be reduced to single digit microvolts giving much better tracking depending on how the PWM is implemented.

[azeeman]

Here's a screenshot of the waveform across the PWM with the bypass capacitor across the filter capacitor. This is AC coupled because the DC level is substantially higher than the peak to peak AC signal. Note that this is a negative feedback signal and the high peaks will cancel a lot of the PWM ripple without changing the DC level.
At first I thought that it was necessary to have substantial PWM filtering to give a good quality signal, but this is completely wrong. The DC level is determined only by the PWM duty cycle and is all the is required for nulling. The AC part of the PWM output must be fed back as negative feedback to reduce quantization noise. This is not intuitive because the feedback is done digitally and is also severely frequency limited by the null detector. But, even though the null detector limits the signal, right at the sample point the decision is dependent on the sum of all inputs at a single instant in time. Because the negative feedback is almost completely synchronous with the PWM ripple, it can effectively cancel a significant part of the ripple.
This implies that there may be optimal values for the both the filter and bypass capacitors based on PWM period. The filter capacitor must be sized for optimal interpolation while the bypass capacitor must be sized for optimal ripple cancellation. Mr. Bode may have something to say about that.

[djsb]

My first impression on seeing this post is that a wall of text such as this is incomprehensible. I have not even tried to read any of it. Anybody with any sympathy for the reader would at least break the text into simpler paragraphs or even shorter incremental posts to make the topic more digestible to the reader. I'm not sure if the original post is an AI generated one or not. It's a shame really as a nano voltmeter would be interesting to design and build.

[azeeman]

I'm not very familiar with this forum and the editing tools. I've tried to put one idea per line, but it's hard to predict how the text will show up once posted. None of the ideas are that complex and breaking it up into smaller posts would sacrifice continuity making it even more difficult to read.
Suffice to say I'm not an AI even though I may write like one. I have a complete outline in my head and just do a data dump to the page.

[helius]

The "Tektronix discontinues K2002" thread has interesting ideas about what separates precision DMMs, nanovoltmeters, and electrometers.

[azeeman]

I've done some more testing and found that the bypass capacitor across the PWM filter resistor is not necessary. A PWM filter capacitance of 1nF seems to give relatively low quantization noise. It's important that film capacitors are used for the PWMs. Ceramic capacitors have significantly higher leakage than film capacitors and this will show as a measurement error.
To get really stable measurements, the best input source is the bias PWM. When connected this way, the measurement is fully ratiometric and independent of changes in the Arduino power supply voltage.
The circuit is intended to be used in ratiometric applications where the main criterion for the reference regulator is stability and low noise. For non- ratiometric measurements, a very stable and precise reference will be required to get good results. Personally, I think that's overkill and its better to just use a commercial voltmeter. This circuit is better suited for something like a quick and dirty load cell meter, thermistor temperature sensing or the like.

[PCB.Wiz]

.. It's a shame really as a nano voltmeter would be interesting to design and build.

Yes, nanovolt is used very loosely here.
When actual numbers are located, it looks to give just 4 digits per 500ms, and the opamp config limits any precision to the offset voltage variation with common mode.
The HW is simple.

[azeeman]

The circuit as shown does have offset problems, but there are simple techniques to deal with it. One way it use another PWM to balance out the offset. Another way is to use a chopper with synchronous detection and AC coupling to eliminate the offset and then use synchronous detection. Synchronous detection is done by nulling at the top and bottom of the waveform using the same null detector. Because the input offset is common to both measurements it is cancelled out.
A simple way to do this is to use a conventional SPI controlled DAC going to one input of the null detector and chop the other input and amplify it to the full range of the DAC. The DAC output is
nulled with the chopped signal when it is low and then nulled again when the chopped signal is high. Because all offsets including the DAC's output, are common, they cancel out. The voltage difference is calculated digitally and averaged to reduce noise. The nulling is not done all at once at each sample interval, instead it is done over time so noise averages out. I've built this circuit and it works well. The only issue is calibrating the AC amplifier gain because it can drift with temperature. A 12 bit DAC was used and the measured offset was a few microvolts.
My original idea with the PWM was to use it to calibrate the AC amplifier gain.
Software can also be used to remove the offset, the input can be grounded and the offset measured. The offset drift is very small with temperature so as long as the offset is measured frequently, it can be compensated for. The trick is to measure it with sufficient precision without using an expensive DAC. A PWM can achieve this precision and is offset free so it can be used for the measurement without introducing offset errors. It does introduce quantization noise, but if the quantization noise harmonics are integer multiples of the averaging period they will average to zero and not affect the measurement.
The circuit shown is just one step on a long journey. It's now possible to very cheaply and simply measure to a decent precision using just the resources of a microcontroller. Op-amps with input offsets in the microvolt range are readily available and by using them in the circuit, a cheap low voltage meter with good precision can be made. I doubt that this project will move beyond the hobbyist stage, but it can easily be built and understood by a beginner with some concepts such as single bit detection which have wider application.
Single bit detection with a PWM is a simple way to replace PID control in some systems. This is not practical for high speed systems, but can be useful for low speed applications like temperature control.
Bridge measurements can be done by first measuring one side of the bridge and then measuring the other side of the bridge and digitally calculating the difference. As long as the temperature remains relatively steady over the time taken to make the measurements and a low offset op-amp with low drift is used, very high precision is possible because the averaging period can be quite long without worrying about offset drift. The difference voltage is calculated digitally and the little input offset there is will be cancelled out. The PWM offset drift is essentially zero so only the op-amp input offset is a concern. The measurement is also ratiometric so as long as the reference voltage is stable it won't add to the error.
One further clarification, the circuit is a Nano Voltmeter, not a nanovoltmeter. This is a play on words since it's based around the Arduino Nano. Regardless, I've run the circuit for more than a day with it measuring it's own input bias voltage and the drift was about 100nV. This drift is primarily op-amp input offset.

[PCB.Wiz]

It's now possible to very cheaply and simply measure to a decent precision using just the resources of a microcontroller.

Yup.
If you want to combine an external opamp, with a low cost MCU's ADC and PWM, there are perhaps smarter ways to do that.

Here is one example, that uses an external Analog switch to remove (significant) MCU rail noise, and operates the single OpAmp with no common mode change and as a true integrator so it is always in the linear region, removing more error sources.

This simple sim example has 4 trial PWM settings so you can see how the SW control loop can measure and track at millisecond speeds.
The Opamp -ve IP can feed to a second ADC channel, for faster initial PWM setup.
Such integrator ADCs are usually also set up to measure over whole mains cycles to reduce mains induced noise effects.