Author Topic: Negating DAC offset voltage  (Read 8563 times)

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Offline microbugTopic starter

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Negating DAC offset voltage
« on: December 04, 2014, 08:51:57 pm »
I'm designing a (moderate) precision DC load which will use a 12-bit DAC. I want to use an external reference because I can use it for the internal ADC on my MCU (PSoC 4200), so I have narrowed down the choice to the DAC7613 or DAC7563. Both are similar in terms of specs, but the DAC7613 had a differential reference input.

The DAC drives an op-amp (OPA4188) which in turn controls a power P-channel MOSFET.

I have two op-amps from that OPA4188 spare. OPA4188s have around 60uV of offset (negligible for my purposes).

Given that either DAC could have an offset voltage of 4+mV, I want to eliminate it. Options which I know of:
  • Use a dual output reference (e.g., REF2041) which outputs 4.096V and 2.048V, and bias the op-amp with 2.06V (using a resistor divider between the two references). Calibration in software. (I'm not sure about this method: it was suggested in this post but I don't see how I could bias the op-amp) EDIT: summing amplifier?
  • Use a standard reference and bring the DAC output down by 10mV using a negative reference. Calibration in software.

I'm reluctant to go with hardware calibration as trimpots can drift, but if that's a better solution then please explain why.

Neither of these is ideal, and I'm no expert with analog stuff. Suggestions?
« Last Edit: December 04, 2014, 08:57:01 pm by microbug »
 

Offline microbugTopic starter

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Re: Negating DAC offset voltage
« Reply #1 on: December 05, 2014, 06:57:53 am »
The op-amp is not powered by the load but by an external power supply. Since the heatsink will be large, it makes sense to power the circuit from the mains. The only leakage current will be that of the FET plus the offset in the DAC output.

What aboit a summing amplifier on the feedback loop of the op-amp? This way, I could use a split reference and add a few millivolts extra to deal with offset. I'll attach a schematic later when I'm at my PC.
 

Offline Circlotron

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Re: Negating DAC offset voltage
« Reply #2 on: December 05, 2014, 09:07:41 am »
You could dither the LSB and easily get another 4 bits or more resolution. Apply your trim factor to the duty cycle of the PWM signal doing the dithering. Don't forget to low-pass the output of the D-A.
 

Offline microbugTopic starter

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Re: Negating DAC offset voltage
« Reply #3 on: December 05, 2014, 06:55:33 pm »
You could dither the LSB and easily get another 4 bits or more resolution. Apply your trim factor to the duty cycle of the PWM signal doing the dithering. Don't forget to low-pass the output of the D-A.

Thanks Circlotron, that's an ideal solution! With several more bits of resolution I won't need range switching which simplifies the design. I'll go with the DAC7563. It doesn't specify a max sample rate, but I imagine 100ksps or so would be fine.
 

Offline microbugTopic starter

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Re: Negating DAC offset voltage
« Reply #4 on: December 06, 2014, 01:47:28 pm »
You could dither the LSB and easily get another 4 bits or more resolution. Apply your trim factor to the duty cycle of the PWM signal doing the dithering. Don't forget to low-pass the output of the D-A.

I'll still want to use dithering, but I don't see how it will remove zero-load offset. At 0V, the DAC will still output a few millivolts which equates to a 10+mA offset. What can I do to get rid of this? I would use a 16-bit PWM driving a FET on the DAC's output, but the PSoC 4200 only has an 8-bit one.

BTW, I realised that the reference inside the DAC7563 has very good specs: I'm using an op-amp with some precision resistors to turn the 2.5V output into a 3.2768V one.
 

Offline dannyf

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Re: Negating DAC offset voltage
« Reply #5 on: December 06, 2014, 02:03:18 pm »
Quote
either DAC could have an offset voltage of 4+mV,

Assuming it is truly an "offset" error (ie, the output is always off by 4mv), you can generate another voltage and apply both to an opamp, with opposite polarity (a difference amplifier or an instrumentation amplifier).

Changing reference voltage will unlikely change the offset.
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Offline microbugTopic starter

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Re: Negating DAC offset voltage
« Reply #6 on: December 06, 2014, 03:32:54 pm »
Quote
either DAC could have an offset voltage of 4+mV,

Assuming it is truly an "offset" error (ie, the output is always off by 4mv), you can generate another voltage and apply both to an opamp, with opposite polarity (a difference amplifier or an instrumentation amplifier).

Changing reference voltage will unlikely change the offset.

Oh, OK. That makes sense. I know that changing the reference won't change the offset, although the DAC's reference is more accurate and has a better tempco, so the output should be more accurate.

The offset is, as far as I can tell, present across the whole range: the datasheet says that the 'offset error' is the same as the 'zero code error' and the max INL error is 0.3 LSB. I'll make a small negative voltage (-10mV) with an inverting op-amp and add it to the DAC output with a summer, then do calibration in software.

EDIT: The offset error drift is only 2uV/C so the calibration should be valid for a decent temperature range.

The other thought I had was that the DAC7562/3 has two channels which have roughly inverse offsets; I could put them in parallel. It wouldn't remove the offset but it would reduce it. I don't know whether or not it would make the output more stable.

EDIT 2: I just realised what you mean. What I was going to do required two op-amps whereas this will only need one; I can generate a voltage of a few millivolts and use a differential amplifier to subtract it from the DAC's output. Thanks @dannyf!
« Last Edit: December 06, 2014, 03:50:38 pm by microbug »
 

Offline dannyf

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Re: Negating DAC offset voltage
« Reply #7 on: December 06, 2014, 04:06:48 pm »
Quote
The other thought I had was that the DAC7562/3

If it has two channels, you can use one of them to generate your desired output, and the other to generate a nulling signal.

Your approach, I think, depends greatly on what you want to null. The talks so far are for open loop nulling: you will code the offset into the software; To the extent that the offset changes, your output will change as well.

Another possible approach is to use some form of feedback + software to detect offsets and null it. It can be done either at start-up, or periodically. It provides more flexibility, but increases hardware / software complexity.
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Offline microbugTopic starter

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Re: Negating DAC offset voltage
« Reply #8 on: December 06, 2014, 04:45:26 pm »
OK, I'll use both channels and have one generate a nulling signal.

This is supposed to be a fairly precise load, but not on a par with the BK precision 8500 series. The current resolution is 1mA and the voltage resolution is 10mV (other ranges are software-controlled). The ICs (DAC, reference and op-amps) are all very low drift; the limiting factor will probably be the precision resistors. I'll have to be vigilant with the thermal design; the load uses a 330W CPU cooler and is supposed to dissipate up to 300W so it could get quite hot inside if I'm not careful.

I won't bother with anything more complex than an open-loop system.

EDIT: I just realised that the DAC7653's reference pin is bidirectional: if I want to use the 2.5V reference externally then the DAC has to use it too. This means I either have to add extra op-amps to make the DAC's output go up to 3.2678, or I have to buy another reference. Buying a reference is cheaper and less hassle, so I'm doing that.
« Last Edit: December 06, 2014, 07:17:10 pm by microbug »
 

Offline peufeu

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Re: Negating DAC offset voltage
« Reply #9 on: December 07, 2014, 09:53:59 am »
Another possible approach is to use some form of feedback + software to detect offsets and null it. It can be done either at start-up, or periodically. It provides more flexibility, but increases hardware / software complexity.

You can use the opamp driving the load-controlling MOSFET.

Let's suppose you design the circuit so that a DAC value of 0 actually translates into a current of a negative few milliamps in the load (more than the maximum offset).

If the load is driven by a standard positive power supply, then it is impossible to have a negative currentt, or course.

Thus, the opamp driving the MOSFET gate will output :

- some positive voltage, a few volts, for any current >= 0
- GND rail, for any current setting <=0

You can ADC or compare this voltage and detect the zero point. The only precision part is the opamp, no need for a precision comparator.

 

Offline microbugTopic starter

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Re: Negating DAC offset voltage
« Reply #10 on: December 07, 2014, 11:12:55 am »
Hmm... that's a good idea! I can keep the difference amplifier and nulling signal from the DAC, but on startup I could set the nulling signal to the lowest it can go and progressively increase it until the ADC detects 0V out. The ADC is easier to calibrate because all it needs is a resistor to ground, so the software can just remember how many counts off it is.

EDIT: Plus, there are no extra components needed.  :D
« Last Edit: December 07, 2014, 11:19:15 am by microbug »
 

Offline dannyf

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Re: Negating DAC offset voltage
« Reply #11 on: December 07, 2014, 12:23:12 pm »
That's the closed loop approach mentioned earlier.

Just so you know that it is not trivial to construct such an amplifier (or comparator), given how low the offset is.
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Offline microbugTopic starter

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Re: Negating DAC offset voltage
« Reply #12 on: December 07, 2014, 12:33:16 pm »
Do I need to amplify it? I thought the suggestion was to use the ADC (probably an external one, judging by the other thread) to sense the offset, and adjust accordingly.

EDIT: There is a spare op-amp available though if needed. I'm not trying to correct the op-amps' offset (max 25uV), I'm trying to correct the DAC's (max 4mV).
« Last Edit: December 07, 2014, 05:51:24 pm by microbug »
 


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