Opamp/DAC brownout behavior

[ezalys]

Hi All,

I'm designing a low noise, low speed, precision (18-bit) DAC for condensed matter physics experiments. The outputs absolutely can't glitch during power-on or power-off, or I could risk destroying the device. Ideally they slowly ramp down if the power is lost and turn on to 0 voltage and stay there until commanded otherwise. I also know that opamps have really weird behavior below their rated supply voltage.

Has someone had to implement a similar circuit? I would like to stick with a simple linear supply, and I'm tempted to use whatever is left in the storage caps to get back down to 0 voltage. Assuming my circuit doesn't pull too much current, I reckon a current sense transformer on the mains lead could tell me if power was pulled and let me ramp down. Microcontroller could look for the 60-Hz mains frequency and put the DACs into shutdown and short the output to ground with relays in the event of an outage. I know crowbarring opamps is not so nice to them but maybe it's ok briefly?

The overengineered approach might be to use lipos or supercaps as a BBU to keep the circuit going until I can get back to 0. However, I don't want to have a huge pile of lipos stacked for the different supplies, and using a series of switch mode converters to get the low lipo voltage up to the necessary rail voltages seems too complex. Any suggestions? Maybe a board with a pile of supercaps on it wouldn't be too bad.

[Medved]

I think the best way would be to use storage capacitor upstream the regulator, monitor voltage across it and from there command the shut down sequence. Then the whole design would be to ensure the main internal supply remains correct till the shut down sequence is complete and the output disconnected from the opamp (before anything active goes wild with collapsing supply).
I don't know what is the allowed minimum ramp up/ramp down time, for the relay you would need about 20ms, so we may be talking about some 50ms till 1s operation since the missing power feed alarm.
Dunno what is the power, but if we are talking about some 100mA at 24V supply, when starting from 48V or so, 40V would be the undervoltage trip point, minimum drop of the 24V regulator around 2V so minimum 26V on its input, we are talking about 1mF/63V capacitor for a shut down procedure taking 100ms and having undisturbed supply available for all the time (to not have to analyze what happens when the supply starts to collapse).
Does not sound to me as not doable...
Of course, use your spec numbers for the calculation...

[ezalys]

Thing is, I would prefer to use an off-the-shelf supply. The physics community really likes these acopian supplies. Getting access to the voltage across the bulk cap could be done by drilling a hole in the side but I don't want to instruct students to do this.

[Marco]

The external power supply is irrelevant ... just put an extra linear regulator with your DAC and have a bit of headroom in the supply voltage from the external supply.

[David Hess]

Circuits which cannot tolerate output glitches during power-up and power-down often use active clamping.  Depletion mode FETs and MOSFETs are useful for this because they are on by default so when combined with enhancement mode MOSFETs, an output can be disconnected and clamped to ground by default.

[coppercone2]

you need to buy a glitch free DAC, they exist.

the accopian supplies are nice.