Out of PCB space,

[MarkF]

Does anyone see a way to reduce this circuit to 2 Op-amps instead of the 3 shown?  Maybe a way to combine the summing amp (B) with the offset amp (C).

Edit:

Some clarification:
  1)  The MCP4802 output is 0V-4V.
  2)  The AD9834 output is a differential output and the op-amp (A) is +/- 2V.
  3)  The op-amp(s) power is +/- 15V.

[Yansi]

Sure. Try to use the opamp on the left for the job the bottom one is doing.

[Kleinstein]

Usually some filtering should be done before the amplification. The OPs have a hard time and can produce artifacts with all the high frequency components.

I don't think it's a good idea to send the sign out directly to an output. Capacitive load, even just a cable can cause trouble.

You might even get away with only one OP, if the offset does not need to be to big.

[Yansi]

Yeah, the sign output should be better buffered. Slam together a few logic gates like 74HC04, outputs & inputs parallel and then match the output impedance to 50ohms with a series resistor (its value depends on the resulting output impedance of the gates).

[MarkF]

Yeah, the sign output should be better buffered. Slam together a few logic gates like 74HC04, outputs & inputs parallel and then match the output impedance to 50ohms with a series resistor (its value depends on the resulting output impedance of the gates).

You do realize the AD9834 is a DDS?  
The output can be either a sine or triangle waveform.  All I'm trying to do is level shift the Vpp output of op-amp (A).  For output (A) of 2Vpp, I would like to be able to offset it at least +/- 2V.

As for the "Sign Bit Output", I'm not too concerned with.  I may never use it.

[jpanhalt]

Why not use smaller surface mount devices (e.g., SOIC) which are not any harder to work with than through hole?  Have you considered a quad version of the TL082 (TL084), its newer version (TLE2084) or the Linear "equivalent" TL1058 in a quad?

John

[Yansi]

Yeah, the sign output should be better buffered. Slam together a few logic gates like 74HC04, outputs & inputs parallel and then match the output impedance to 50ohms with a series resistor (its value depends on the resulting output impedance of the gates).

You do realize the AD9834 is a DDS?  
The output can be either a sine or triangle waveform.  All I'm trying to do is level shift the Vpp output of op-amp (A).  For output (A) of 2Vpp, I would like to be able to offset it at least +/- 2V.

As for the "Sign Bit Output", I'm not too concerned with.  I may never use it.

I do realize it quite well, but you don't read well. 

Sign output should be also buffered. Sign output is a logic output.

And also don't forget about this paragraph from the datasheet:

Proper operation of the comparator requires good layout strategy. The strategy must minimize the parasitic capacitance between VIN and the SIGN BIT OUT pin by adding isolation using a ground plane. For example, in a multilayered board, the VIN signal could be connected to the top layer, and the SIGN BIT OUT could be connected to the bottom layer so that isolation is provided by the power and ground planes between them.

[MarkF]

My point is that I'm NOT interested or using the Sign Output.
My main interest is the differential analog output.  This is a one-of after thought.  I've been using this PCB for software development for another project and thought I'd add the DDS to get some limited utility out of the board.

Here are a few photos.  Sorry for the poor quality.

[MarkF]

UPDATED DRAWING.

Can we get back on topic now???     

[Yansi]

You can offset shift the signal right in the first opamp. Connect the vertical 2k7 resistor not to ground, but to whatever ref voltage needed. You can then sum with the DAC voltage directly, without the additional opamp to invert and offset DAC voltage.

(Sidenote: It's hard to tell you what to do with the schematic, if the components are not numbered.)

Also, as was already pointed out, the overall circuit topology is not the best. The lowpass filtering should be applied right after the DDS output. The filter also has to have a correct termination resistance at both ends. Otherwise the filter performance will vary  with the loading of the filter output.  Another reason has been already stated, the the opamps will be more satisfied working with already filtered signal :-)

And BTW, the DDS is quite fast for those TL084. What maximum frequency output from the DDS are we talking about?

[MarkF]

You can offset shift the signal right in the first opamp. Connect the vertical 2k7 resistor not to ground, but to whatever ref voltage needed. You can then sum with the DAC voltage directly, without the additional opamp to invert and offset DAC voltage.

(Sidenote: It's hard to tell you what to do with the schematic, if the components are not numbered.)

Also, as was already pointed out, the overall circuit topology is not the best. The lowpass filtering should be applied right after the DDS output. The filter also has to have a correct termination resistance at both ends. Otherwise the filter performance will vary  with the loading of the filter output.  Another reason has been already stated, the the opamps will be more satisfied working with already filtered signal :-)

And BTW, the DDS is quite fast for those TL084. What maximum frequency output from the DDS are we talking about?

I think I see what you mean.  See drawing.  The output of op-amp (C) will need to go +/- to provide both positive and negative level shifting.

I'm only using a 32.768MHz clock for the DDS, so the maximum useful frequency is only going to be around 1MHz.  I'm not expecting great performance.  Just a signal to test with now and then.

[T3sl4co1l]

Also, the output filter is 75 ohms and 25MHz, neither of which really makes sense here (100 ohm series resistor, ?ohm output)?  If you're going for an antialias filter, it should probably be placed at the DDS output pins, since the TL082 isn't going to know what to do with it anyway.

Yeah, you only need one amp, and perhaps a buffer (to drive the, I would assume 50 ohm, output).  There are lots of 5V RRIO amps with good performance (speed and offset) you can use, so you don't even need the +/-15V rails.  Although you'll still need at least +/-5V if you want a normal bipolar output, of course...

To get offset in there, just run a resistor from the '4802 to the op-amp -in.  The resistor acts in parallel with the other two resistors on that node, so you should have an equal amount in parallel with the complementary (2.7k) resistor on +in.

Tim

[Aodhan145]

Why not go all smd? You can get tiny packages and would elimintate the need for removing an opamp

[Yansi]

I'd suggest a few mods to the circuit, to increase the performance, significantly, for little cost extra:

1) get rid of the differential output from the DDS. It can work single ended. Terminate both outputs with 200ohm resistor (as you have already) and use only the IOUT output.

2) design a better lowpass filter, using for example old AADE Filter Design software tool. Very old and rusty software, but HELPFUL a LOT. Design the filter as a lowpass 200ohm at both ends, 5th or 7th order. Design the cutoff frequency as low as possible, to get the best performance. So for your maximum 1Mhz output, you can use a cutoff of about 2-3MHz (still reasonable, as your DDS clock is 32MHz, enough margin there). Place another 200ohm termination resistor after the filter (so it will be terminated 200ohm both ends).

3) use some cheap and fast signal opamp to amplify a bit and offset shift the signal. Something like OPA354 or LMH6611 (with these, you can go way up with the output frequency!)

4) use some suitable buffer amplifier, preferably a CFA like AD811 to power and current boost the output. Make sure you don't exceed it's power dissipation, sticking a small heatsink to it recommended anyway.  Place 50ohm resistor on its output, to match the output impedance to such standard value.


I know, this is not a full cookbook for making a sinewave signal gen. with a DDS, but might give you some basic ideas.

[MarkF]

I've just thrown this together with junk parts that I have on hand.  Didn't want to put much into it.  I will spend some time looking at everyones suggestions.  However, it all has to fit on this little prototype board.  This PCB was intended for doing software development and I never intended to put the DDS on it.  The output filter I just copied from somewhere and didn't even check the 3 dB freq.

[MarkF]

New output filter with 2 MHz cutoff.

[Yansi]

Please read carefully our suggestions again. The design is still very wrong.

You still have the filter in a wrong place. You still do not have well defined output impedance of the filter. It is nice to have there a 51ohm terminating resistor, but that wil work only without load on the BNC output.

The filter has to be directly on the DDS output. Use only single endded output, use 200ohm filter imepdance.

[XFDDesign]

The outputs of the AD9834 are rather fussy due to being drains (thus high-z nodes). Throwing a lot of reactive parts for filtering right at their outputs has caused some curious behaviors as a result.

OP: I haven't seen much on the "what I'm trying to achieve" front. What is the minimum frequency you're attempting to obtain? You've mentioned max of ~2MHz (given filter cut off).

Could you give us a run-down of the actual specs you're after for the design? That will be the easiest to get you to your goal.

[Yansi]

Bullshit. The outputs of the DDS are whatever but current sources and should be terminated with resistors. As it is clearly stated in the datasheet.  Current source is impedance in its natural form, so is the impedance defined by the terminating resistance. So it is rally completely correct to playce the filter directly on the output! If the current source is terminated with 200ohm resistor, then the output resistance is well defined 200ohm. YOu can use that directly to feed the LC network.

Current Output. This is a high impedance current source. A load resistor of nominally 200 ? should be connected between IOUT and AGND. IOUTB should preferably be tied through an external load resistor of 200 ? to AGND, but
it can be tied directly to AGND. A 20 pF capacitor to AGND is also recommended to prevent clock feedthrough.

[XFDDesign]

Bshit. The outputs of the DDS are whatever but current sources and should be terminated with resistors. As it is clearly stated in the datasheet.  Current source is impedance in its natural form, so is the impedance defined by the terminating resistance. So it is rally completely correct to playce the filter directly on the output!

The terminating resistors do present a DC load of whatever the impedance is, yes. No one is disputing that. But, perhaps, in all of your masturbatory self flagellation, consider the reactive nature of that filter as it looks to the high impedance node of the drain or collector. Suppose a classic 3rd order Pi filter were used at 2MHz. The shunt Cs being 1.59nF and series L being 15.91uH. For the sake of evaluation, we'll pick 1MHz as a test case. At this frequency the caps provide -j100 ohms of reactance. The inductor gives j100. What is presented to the high impedance node? Through the transform at 1MHz, about 200 ohms.

(Process:
1. Admittance of output C with 50ohms: 0.02 + j0.01
2. Impedance of transformed shunts: 40 - j20
3. Add +j100 for inductor: 40 +j80
4. Resolve to admittance: 0.005 - j0.01
5. Add input capacitive admittance: 0.005
6. Which is 200ohms of impedance. )

Repeat this at 10kHz, 50+j0.5 ohms.

It isn't uniform, and as such, quite erratic. Using a DTC or STC, or only operating over a very narrow band where the circuit is "in tune" is one thing, but as broad-band as the OP might be trying to pull off, no. If you still disagree, either show the error in the math above, or go spread your disinformation to some other forum and stop being an intellectual poison here.

Supposing the 3mA swing relative to DC bias, the output node will present a 150mV amplitude signal at 10kHz, and 600mV at 1MHz. The outputs will then follow the same irregularity and non-uniformity because of the reactance that filter provides.



Put into the frequency domain, and we see why:


That terminating resistor is not padding the filter property due to the influence the high-impedance source has.



The filtering is important for a number of reasons, but knowing where to filter and how to apply it correctly are also equally important. Designing a stage for the DDS' outputs to feed into in a way that provides uniform behavior is quite important. The first goal is then to translate the touchy, sensitive outputs into something the designer has control over. Thus, the questions about what he is trying to achieve.

You can dismiss yourself now.

[T3sl4co1l]

Heh...

You're using the wrong filter design.

The CCS is an open end.  You have to use a one-end-open, other-end-terminated design.  There are tables for this (which I don't have handy at the moment).

Or terminate it so it's a Norton equivalent source (and use a doubly terminated filter design, which is the conventional type).  The downside is -6dB in voltage, but this isn't a big deal here.

Tim

[XFDDesign]

It was an example that illustrated the point, and yeah plenty of tables online depending on the need for Butterworth, Chebychev, etc. Their use still requires an idea of what problem is trying to be solved.

And quite, terminating locally (in addition to the far-end term) to do the Norton equivalent will do it - 6dB loss be damned - but that still requires careful consideration of the high-z node. For some of my tuned amplifiers, I'll just set the bias conditions for the targeted impedance I need, use the resonant components to do whatever function I'm after, and get my output, but it still requires thinking about what I'm trying to pull.

[XFDDesign]

For fun, I did a quick analysis doing the doubly-terminated version, there is still a hazard of exceeding compliance range on the IOUT/IOUT# signals if the reactance isn't given careful attention still. Do a 3rd order Pi filter with Zt=400 ohms for maximum voltage, the Cs are 200pF, and the L is 63.6uH. Indeed you get a nice maximally-flat LPF at 2MHz on the output. At the input, right at around 2MHz, you get a reactance of 299-j100 ohms which generates a peak of 947mV, 347mV above compliance (the AD9834's datasheet didn't go through the rigors that some of the newer DDS parts have).

[Yansi]

Bshit. The outputs of the DDS are whatever but current sources and should be terminated with resistors. As it is clearly stated in the datasheet.  Current source is impedance in its natural form, so is the impedance defined by the terminating resistance. So it is rally completely correct to playce the filter directly on the output!

The terminating resistors do present a DC load of whatever the impedance is, yes. No one is disputing that. But, perhaps, in all of your masturbatory self flagellation, consider the reactive nature of that filter as it looks to the high impedance node of the drain or collector. Suppose a classic 3rd order Pi filter were used at 2MHz. The shunt Cs being 1.59nF and series L being 15.91uH. For the sake of evaluation, we'll pick 1MHz as a test case. At this frequency the caps provide -j100 ohms of reactance. The inductor gives j100. What is presented to the high impedance node? Through the transform at 1MHz, about 200 ohms.

(Process:
1. Admittance of output C with 50ohms: 0.02 + j0.01
2. Impedance of transformed shunts: 40 - j20
3. Add +j100 for inductor: 40 +j80
4. Resolve to admittance: 0.005 - j0.01
5. Add input capacitive admittance: 0.005
6. Which is 200ohms of impedance. )

Repeat this at 10kHz, 50+j0.5 ohms.

It isn't uniform, and as such, quite erratic. Using a DTC or STC, or only operating over a very narrow band where the circuit is "in tune" is one thing, but as broad-band as the OP might be trying to pull off, no. If you still disagree, either show the error in the math above, or go spread your disinformation to some other forum and stop being an intellectual poison here.

Supposing the 3mA swing relative to DC bias, the output node will present a 150mV amplitude signal at 10kHz, and 600mV at 1MHz. The outputs will then follow the same irregularity and non-uniformity because of the reactance that filter provides.

.... //images deleted to shorten quote// ....

That terminating resistor is not padding the filter property due to the influence the high-impedance source has.



The filtering is important for a number of reasons, but knowing where to filter and how to apply it correctly are also equally important. Designing a stage for the DDS' outputs to feed into in a way that provides uniform behavior is quite important. The first goal is then to translate the touchy, sensitive outputs into something the designer has control over. Thus, the questions about what he is trying to achieve.

You can dismiss yourself now.

Dear XFDDesign,
don't you think that your behavior is worse than a five yr old childs? What did gave you the right to call me such way, if you, yourself, can not follow simple and clear instructions for a simple filter? Where did you get that feeling, the filter should be connected one side to a high impedance current source?  I've said many times, the DDS has to be terminated, 200ohms to ground with a resistor (to make a norton source equivalent). Also I have clearly stated, the resulting filter have to be terminated both ends. Which part didn't you understand?

Get rid of the differential output from the DDS. It can work single ended. Terminate both outputs with 200ohm resistor (as you have already) and use only the IOUT output.
Place another 200ohm termination resistor after the filter (so it will be terminated 200ohm both ends).

This is a correct way to do it. Full stop.

Best regards,
Yan

EDIT: Added picture for those without basic imagination.

[XFDDesign]

Dear XFDDesign,
don't you think that your behavior is worse than a five yr old childs? What did gave you the right to call me such way, if you, yourself, can not follow simple and clear instructions for a simple filter?

When your first response is "Bullshit," and then flap on in masturbatory grandeur, no. If you're going to approach as a grand wizard, and come up a fraud, you'll be treated as a fraud.

Where did you get that feeling, the filter should be connected one side to a high impedance current source?

So it is rally completely correct to playce the filter directly on the output!

I guess, from you. Both drains and collectors are high impedance nodes (in linear operation). Gluing a filter to them and then terminating it is still bolting a reactive network to high impedance nodes. Doubly-terminating still doesn't even solve all problems which I'll get to below.

I've said many times, the DDS has to be terminated, 200ohms to ground with a resistor (to make a norton source equivalent).

As you bag on the OP for not reading, its' fascinating that you've failed to look at the schematics in my post. There you will find that, indeed, the output is terminated, be it 50, 200, or 400. In fact, it's terminated to ground. Your post mentioned nothing about norton... but given:

Also I have clearly stated, the resulting filter have to be terminated both ends. Which part didn't you understand?

Let us quote your post in response:

Bullshit. The outputs of the DDS are whatever but current sources and should be terminated with resistors. As it is clearly stated in the datasheet.  Current source is impedance in its natural form, so is the impedance defined by the terminating resistance. So it is rally completely correct to playce the filter directly on the output! If the current source is terminated with 200ohm resistor, then the output resistance is well defined 200ohm. YOu can use that directly to feed the LC network.

The phrase "terminated on both ends," is found precisely zero times. The DS mentions only singly terminating with 200 ohm resistors, which is due to the consideration of the high impedance nodes needing to be constrained to within compliance voltage. Thus far, you've yet to actually refute anything, justifying your claim of "bullshit."

Get rid of the differential output from the DDS. It can work single ended. Terminate both outputs with 200ohm resistor (as you have already) and use only the IOUT output.

Single-ended, OP could just ground the unused output and save the space of 1 resistor. Singly-terminated still won't solve the very same problem you've failed to rebut in the post I followed up with wherein math was used (as well as spice) to illustrate the problem with your self aggrandized claim.

Place another 200ohm termination resistor after the filter (so it will be terminated 200ohm both ends).

Which is a statement strangely missing in the primary "Bullshit" post you made, and even then, as I pointed out just prior to your post which I'm addressing, still isn't guaranteed, and it is backed with math

This is a correct way to do it. Full stop.

No, it's a remarkably piss poor attempt at saving face after you were just shown to be full of it. You've not actually refuted the points which called your "Bullshit" claim out as little more than a haphazard spaghetti-against-the-wall design methodology.

The correct way to "do it," with regards to engineering, is to show me the math, or leave. If my math is wrong, and you're right, prove it. I have applied the math on both approaches, and shown that both still have issues which result in the appearances on the drains to be sensitive. I've backed up my claims, you haven't.