I am making a simple (as it always seems in the beginning) device that measures the relative capacitance change in MLCCs when they are subjected to DC bias based on the idea described in Maxim Integrated's
AN6014.
The oscillator+integrator part is next to trivial, it works just fine in both simulation and on a breadboard.
The part that produces the DC bias voltage is more difficult to get done right:
1) I want it to go from exactly (within a few mV) zero to as close to the upper rail, which is 40V coming from a boost converter, as possible -- worst case, I'll be satisfied with say 35 V;
2) it must be as stable as possible, i.e., keep the bias voltage at the set level with little deviations induced by the AC component in the capacitor being tested, because otherwise it can have a significant effect on the device's readings.
I will explain how I approached it to answer some possible questions.
My first thought was to use LM317, but a) 35-40V is at its limits; b) it can only source, but not sink current, and sinking current is required to maintain good load regulation.
I don't want to search for and get a fancy part that can do this out of the box (but if it exists, please let me know!), because it will make it less fun, and I want to make use of my stockpile of generic parts instead of acquiring yet more stuff.
So I decided to use an op amp that would drive some transistors, for which I have a conveniently unused fourth unit of LM324 whose other three units do the rest of the job in the circuit.
The desired output voltage is set by a potentiometer that goes from ground to the reference voltage provided by e.g. TL431, which is then amplified by the op amp and the push-pull output stage.
Adjusting zero output to be exactly at ground level (required because LM324 doesn't shine in the input offset voltage department) is done by biasing the feedback voltage as shown in TI's
AN-31 on page 12.
Since the op amp cannot output 35-40V directly, a voltage (and, to an extent, current, even if low, to respond quickly to the changing output voltage) amplifier is needed.
Here's how I did it:
This works in both simulation and real circuit. Even though it's on a solderless breadboard, load regulation remains pretty good: output voltage stays within ±10 mV of the set point, when C3=200μF, and it can further be improved by adding more wires in order to additionally connect ground points in various locations of the breadboard, so I guess it's going to be better on a proper PCB.
When the set voltage is reached, current through R5 and R10 does not exceed ~±15 mA peak (with a little bit of an undershoot of ~-25 mA on the bottom one) and there is no cross conduction; there is a ~50μs dead time when switching occurs.
Amplitude of the AC component across DUT is 200mV (400mV p-p).
C2 is required to reduce output noise seen across both R5 and R10 with OUT used as reference point. I believe it is some parasitic oscillation in the low-MHz range, but its amplitide is too low for my scope to properly see what's going on there -- I only see that it's reduced when C2 is inserted. The value of the cap is picked experimentally and it works in both real circuit and simulation.
R4 and R6 were picked experimentally: I started with R4=2k and without R6 at all, but ended up with the values shown, that's where the noise/oscillations mentioned above went to a minimum.
D1 and D2 are zeners that prevent Vbe breakdown, which in the real circuit may potentially be reached in the turn-on transient (and if the user manages to rotate the bias adjustment pot fast enough).
Support for DUT capacity higher than 100μF is not planned.
There are things I don't like about this design.
Firstly, output regulation begins to fail when the set voltage reaches about ~4.2V below the upper rail. This apparently happens because voltage drop across R1 is too high to keep the base of Q3 at a required level, thereby reducing its maximum possible emitter voltage. Reducing R1 helps, but not much, and there is a limit to how low it can go, because of power dissipation.
Secondly, even without C1 (DUT), a pretty big C3 is required. Without it, the op amp begins to oscillate wildly, I mean, not just become a little noisy, but the operation is screwed altogether. It happens in simulation just as well. Why is that? From my experience, when a classic push-pull stage (class B amp) bases are driven directly by an op amp, it is stable even when there is no compensation cap across the upper feedback divider resistor. It only begins to oscillate with considerable capacitive loads.
In this case, however, a voltage amplifier stage is added, which, apparently, makes all the difference.
Getting rid of C3 and instead letting the op amp quickly compensate the disturbance caused by the oscillation in DUT would sure be nice, but is it possible?
I have tried to simulate some other circuits, for example, one with PNP on the top and NPN on the bottom, which should allow the output voltage to almost reach the upper rail, and indeed it works that way (in simulation -- I didn't build it). However, there is a significant cross-conduction: hundreds of mA when set voltage is reached, and several amps when it's changing following a fast rise or fall of the input voltage. This isn't acceptable.
Here's the circuit. I am sure that I did something wrong here. Is the basic idea viable or this isn't the way to do it at all?
What are other ways to do this? Can my first circuit be improved to address the concerns I expressed above? Any ideas are welcome. Note, however, that the 40V rail is only the voltage that my current boost converter goes to -- that's an MC34063A (yes), and after playing with this one I might want to make a second revision that can go up to, say, 60 or 100 volts, so I need a design that will work for a general case, rather than cheating by e.g. finding an op amp that works with 45V.
Home
Help
Search
Login
Register
