I understand why logic levels are inverted,
When PIR is inactive, base is pulled to GND, 2N2222 is in cut-off, no current flows C->E, GPIO is pulled up to 3.3V.
When PIR is active, OUT high (~3.1 V), V_BE at ~0.7 V, base current flows, 2N2222 saturated, C->E conducts, collector (and GPIO) pulled to 0 V.

I still don't quite understand why the original circuit did not work, it did not work on 2 separate Pico2 (RP2350), (worked instantly on Pico1 (RP2040).
Do you not think this is relevent? (Errata E9)
