PCIE reset signal fix

[blazini36]

I own a couple of these small PCs https://www.seeedstudio.com/ODYSSEY-X86J4125800-p-4915.html

It has 2 1gbe NICs on board. I found an issue with one of the NICs when I use an M.2 to PCIE x4 adapter. The NIC is still recognized in Linux but won't connect to anything when a PCIE card is plugged into the adapter, but the card works fine. After some back and forth with the manufacturer they found the issue as well and their response was "the reset line from the CPU can't supply enough current when the card is plugged in and it affects the NIC".

I did some testing and the card NIC and card work fine when the reset line (PCIE PERST# signal) is disconnected from the adapter. Not sure if this will cause some issue, the reset line is there for a reason. Testing the line with it connected and the card plugged in I find that the reset line is pulling up to 3.3v at the card a few seconds after power on just as it should, meaning it's not being held down at the card. The way the PC is laid out I'll never find the reset line to test it at the NIC but I assume maybe they used a current limiting resistor with too high a value on the line or something.

This PC is for a special project and to keep the form factor I need to make a custom M.2 to PCIE adapter PCB anyway. There's plenty of space on this PCB to do whatever. I was thinking i can use a transistor or something to work the reset line for the PCIE card. Any suggestions as to the circuit/transistor I might use. I was thinking I'd want to use a PNP BJT since the CPU is pulling up and holding the line, but I'm not the type of person who has a transistor catalog in my head.

[blazini36]

Had to do a bit of reading up on transistor configurations, looks like a PNP-NPN darilignton pair is what I'm looking for. Since I'm not 100% sure what's wrong with the Seeed board, I don't know for certain this will fix anything but otherwise it should work.
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