1. As others have said, C16 is in parallel with the LED's dynamic impedance, which is quite low, so at the very least it has to be many times larger than shown to get the expected pole. The resistors also act in parallel with C14, raising its pole -- when you have a chain of RC filters, you cannot get repeated poles (let alone complex poles), instead the poles push each other away and you end up with a very, very soft response.
The best you can do is a tapered impedance, say R6 is 10 ohms, R8 is 220 and say we add another resistor between C16 and the LED of 220 ohms as well. This gives C16 about 100 ohms around it, and C14 around 10 ohms; if we set C14 = 1mF and C16 = 100uF, we get similar poles, and about as sharp a cutoff as we can expect.
2. You're also coupling maximum supply ripple into the poor LED. This was hinted at above as inrush, but perhaps not made fully explicit. Every minute variation between DGND and VCC5 is coupled directly into the LED.
Trivial fix: wire the LED to DGND, or ground the caps to VCC5. Keep ground references consistent!
3. As has also been mentioned, active filters don't need to be difficult. A single transistor will do, though it's not like it's a pain to put in a SOT-23-5 opamp, say a TLV2371. Most of the layout space, and assembly cost, will go to passives regardless.
Just to show it works in any technology, here's one I designed for audio frequencies using a vacuum FET:
Note the response shelves at HF (to a ~ -48dB asymptote), which is due to the finite gain of the active device (about 5mS). You could use, essentially the same circuit with a BJT, though you'll want the resistor values smaller to adjust for a 5V supply, as I'm guessing you won't have 100V available.
Also easy to put into a simulator, so you can tweak the values for desired response and availability. (Seems I happened to get best results with the 6.8n caps I had on hand, among other things, so that worked out nicely there.) The R and C time constants are a bit peculiar, due to the gain affecting them -- indeed, it is possible to make an oscillator here (though that requires one or more additional RC stages to the grid/base), so just start by scaling everything linearly, then tweak parts by say 20% at a time until it's where you want it.
You want lowpass, so obviously C1, C2, C8, R1 and R3 go away, and probably R6 and R7 as well.
Note that the result is almost identical to brabus's circuit, and this is no accident. The two lessons we can apply are these: a. the R and C values are equal, so the cutoff will be very soft, much softer than needed, which means attenuation or response time is left on the table; b. by moving C2's ground reference to the emitter instead, we get the Sallen-Key topology where we can peak response for best risetime or sharpest attenuation. We also know we can get a 3rd pole for free, by putting an RC in front of the filter (of course again changing R and C values to suit).
Noteworthy, the open-collector output has a constant-current characteristic, so any VCC5 supply ripple is dropped primarily across the transistor, with very little effect on LED current. This serves the same function as changing LED or cap ground reference above.
The LED can also be in the emitter circuit (in which case the collector goes straight to VCC5), the downside is a higher offset voltage (Vf + Vbe) which wastes more PWM% range. In this configuration you are still limited to some maximum PWM less than 100%, for a similar reason (actually Vf + Vce(sat) - Vbe, more or less), but it is a wider range, so it's a good choice.
4. Final note -- whatever the PWM is coming from, will influence the output just the same. That is, if it's a microcontroller running from VCC5, then any variation in VCC5 will again act, proportionally, on the output. A PWMDAC is a multiplying DAC, and the output equals PWM% times VCC. The PWM is well filtered, so you're safe from high frequency variation, but low frequency variation, drift, whatever, is straight through. If greater stability is desired, buffer the PWM signal with a logic gate (preferably an SPDT analog switch) supplied from a stable VREF.
Note that the transistor does introduce a source of drift, as Vbe depends on temperature. This can be addressed with a second transistor in a zero-offset follower (it's not actually zero, but the Vbe's and tempcos cancel out a heck of a lot better than no cancellation whatsoever):
At this point you're easily spending as much effort as plunking down an op-amp, so weigh your options accordingly.
Ed: oh yeah, I do have an even more directly relevant example--
https://www.seventransistorlabs.com/Images/EE409_Schem_r_4.pngnote the two PWM channels, buffered by gates to VREF, and filtered. This gave a precision output for a digitally controlled bench SMPS.
Tim