Please help design discrete JFET preamplifier

[Yansi]

Hello,

I am trying to design a discrete preamplifier with JFET to serve as a frontend to a simple measurement jig.

What I am trying to achieve:
Supply voltage: +-5V
Input impedance: 1Mohm
Bandwidth: 20Hz to 100kHz or better
Gain: 11x (21dB)
Input level: 200mV  rms

I am kind of lost as how to attack this.  For example, how could one adapt the following circuit/s for the symmetrical supply (ground referenced signal input and output)?





I have made a few experiments and this what I came up with seems to be as close as I can get it to do what I want:

[Kleinstein]

Reaching some 6 V peak to peak cold be difficult with the amplifiers shown and only a +-5 V supply.
The last circuit is Ok with ground referenced input and output, but I don't think it would reach the amplitude.

For selecting the resistors spice is your friend.

[Yansi]

It seems I did not screw up too much, as it indeed does work, even with 2Vrms output.  Even the distortion seems to be still very low at 100kHz. But a little compensation would help, testing with square shows fugly overshoots on the edges.

Here's a shot of the circuit above.

I was just curious if there is any better way to do it. 

(I did not want to use an opamp, as this will probably be less noisy, than say TL072).

[Yansi]

Spent a while tweaking it. Here's the result! 



And running a 500kHz square. I call that a success.  And mind you, I built the circuit on a breadboard.  I think I have pushed the limits.  The -3dB point is at about 2.4MHz.

[magic]

That's some original way of drawing PNPs

Beware that input impedance is less than 1MΩ at 100kHz.

[Yansi]

Whats original on that? Thats how the local normative tells us to draw it.



Sure it won't be 1M @100k, there will be also a compensated divider on the input.

[Zero999]

Designing discrete amplifiers is fun but why not use a J-FET op-amp? What's wrong with the TL072?

[magic]

Whats original on that?

The arrow of course. Compare with the template you posted.

edit
I can't find links but I think I have seen circuits where the drain (or collector) of the input transistor is bootstraped by capacitor from the output to null gate-drain capacitance within the bandwidth of the amplifier.
This reduces input capacitance to Cgs divided by loop gain or something like that.

[Yansi]

Designing discrete amplifiers is fun but why not use a J-FET op-amp? What's wrong with the TL072?

Noise. I need to work with signals 20mV full scale with this preamp.

Also, TL072 is 3MHz GBW, so with gain of 11, we are talking 270kHz unity gain, if I am not mistaken.

[Yansi]

edit
I can't find links but I think I have seen circuits where the drain (or collector) of the input transistor is bootstraped by capacitor from the output to null gate-drain capacitance within the bandwidth of the amplifier.
This reduces input capacitance to Cgs divided by loop gain or something like that.

Good idea, actually. Makes sense. But, 500kHz BW is more than enough. The target was 100kHz.  But I may push the whole further, on the final PCB.

What I currently think about is that the circuit still does not have a stable DC operating point. It all depends on the Vgs of the JFET, significantly. And as I have pretty tight  tolerances on the output voltage, due to the high swing requirement, I as well may need an external DC servo to stabilize the amplifier. 

[magic]

I only suggested it as a way to get flat input impedance, not more bandwidth.

And beware that I can't find links so it could be my own invention never tested in practice. Beware that I also invented a perpetual motion machine at age of seven

[Someone]

Designing discrete amplifiers is fun but why not use a J-FET op-amp? What's wrong with the TL072?

Noise. I need to work with signals 20mV full scale with this preamp.

Also, TL072 is 3MHz GBW, so with gain of 11, we are talking 270kHz unity gain, if I am not mistaken.

Ok, so what noise are you getting from the circuit you are using? What is the source input impedance? There are many opamp choices applicable.

[Kleinstein]

The TL072 is not very good noise wise and DC performance is also limited. There are considerable better modern OPs available (e.g. OPA140, OPA827, ADA4625 and similar). These also have pretty good DC performance.  With the right JFETs one may get lower noise with discrete version, but the BF245 shown in the plan would already be higher noise.

To also get good DC performance with discrete JFET input, I would consider a 2nd JFET as current source or in a differential configuration and combining it with an OP. There are few different options, depending on wether DC performance or white noise is more important.

1 M impedance up to 100 kHz would need a very low input capacitance (less than some 1.5 pF !) - this would be main difficulty. Chances are one would need drain side bootstrapping or at least a cascode input stage.

[Yansi]

TL072 was given due to being already in the BOM and available. No interest in switching to other types.

Who did say BF245?  My schematic says 2SK170, which is I think a pretty low noise floor FET.

1M is critical especially at low frequencies, compensated dividers are what is there to fix the HF response.

DC performance is not critical, I am not interested in DC signals.  20Hz or so cutoff is fine. All following and preceding stages are AC coupled anyway.

[Kleinstein]

The BF245 was is he first plan shown. The 2SK170 is in deed low noise, but also relatively high input capacitance.  So the input divider has to take the capacitance into account.  Other types can have lower capacitance (e.g. about half with 2SK3557) .

If really this noise noise level is needed, an OP is indeed not a real choice.

With discrete JFETs one kind of has to adjust the DC operating point. One could add a automatic DC adjustment from the output: So have an OP do extra DC feedback. So one can get away without extra loading to the input, more like virtual AC coupling at the output side.

[Zero999]

You have conflicting requirements. J-FET noise and capacitance are related. To get lower noise, the gate junction ares needs to be increased, but that also increases the capacitance.

[T3sl4co1l]

What is the source?

20mV isn't a very small signal.  What dynamic range are you after?

Tim

[Kleinstein]

A 1 Mohms divider also has some noise on it's own. So if possible I would avoid dividing the signal all the way down to 20 mV.

For a low noise and low input impedance amplifier there are a few articles from NIST/NBS about a rather similar amplifier. To reduce the input capacitance they use bootstrapping the FET.

[iMo]

Here a few simulations. Not sure about the noise simulation, however.

[magic]

In my experience LTspice reports voltage noise contribution of transistor input stages as the theoretical minimum: shot noise of collector current divided by transconductance. AFAIK it's mostly correct at high frequencies unaffected by 1/f noise.

edit
Until you run into Johnson noise of the base/gate parasitic resistance. Dunno if LTspice has models of that.

[SiliconWizard]

Until you run into Johnson noise of the base/gate parasitic resistance. Dunno if LTspice has models of that.

According to LTSpice help:

.NOISE -- Perform a Noise Analysis
This is a frequency domain analysis that computes the noise due to Johnson, shot and flicker noise. The output data is noise spectral density per unit square root bandwidth.

Do they model only Johnson noise for discrete resistors or also for parasitic resistance in other models, I have no clue.

[Kleinstein]

The LTspice noise data are for the output. The NBS circuit has a much higher (x201) amplification. The circuit from Yansi still has quite some noise from R7 (1K) - so for really low noise the resistors should be a little lower. This may requite an additional emitter follower to get more output power. A low gain of only 11 and still very low noise is not an easy/low power combination.

How much noise is included with the parts depends on the model. Not all models include noise. Some of the models for BJTs / JFETs seem to be realistic with some 1/f noise, but not all. Chances are parasitic resistance will also have noise modeled right, but quite a few of OP models do not include noise.