Push-pull audio amp design issue.

[antenna]

I made an audio amp based on TSP's youtube video #23, but it won't put out the voltage I expect from it. I designed it for 4v pk-pk (i thought...), but it hardly gets to 2v pk-pk before flat-topping . It's a push-pull class B, 6v split supply driving an 8Ω speaker. Here is the schematic and this is what I did...


Step 1) The push-pull pair needs degeneration resistors, I went with 1Ω as I had them available. So that means each transistor will see a 9Ω load.

Step 2) Being I want 4v pk-pk (2v work from each transistor), 2v/9Ω=222mA should be the max current that each transistor will ever see (rms will be lower, but I am worried about calculating base current here).

Step 3) My transistor tester says these amazon "multi-pack" variety S8050 and S8550 transistors have beta of 200. So, that means the base current should be 222mA/200=1.1mA. But for the emitter follower driving the base to supply it, that transistor will also need some current, so I double it and say 2.2mA through those resistors. To have the push-pull pair biased for B, I need .7v on the top driver emitter and -.7v for the bottom driver's emitter.

Step 4) that means the emitter resistors will have 3v-.7v=2.3v across them when biased properly. And 2.3v/2.2mA=1045Ω.  I went with 1kΩ.

Step 5) Biasing the drivers. I went with 10x the base current here, so, 2.2mA/200*10=.11mA and 6v/.00011A=54,545Ω total ~ I just call it 22KΩ for each resistor.

Step 6) If I were to input a signal here, it would see those two bias resistors in parallel, and to cut a few corners, lets call the impedance here 10kΩ.

Step 7) So, if I want to drive that with very little voltage drop, I need a 1kΩ source impedance or better... I also need voltage gain of 4 because my signal is 1v pk-pk and I want 4v pk-pk, so lets kill 2 problems with 1 transistor. Calling the collector resistor my output impedance (1k), that makes my emitter resistor 250Ω (for 4x gain). I used 220Ω as that's all I had.

Step Biasing that bugger now... Again, with a beta of 200 and following the usual procedure (and assuming the collector is going to sit at about .35v to split the voltage available after the emitter resistor eats a little).... 3v-.35v=2.65v across the 1kΩ resistor for a collector current of 2.65mA. That means there is 2.65mA/200*10=.133mA through the bias network for that stage. And with 2.65mA also going through the 220Ω emitter resistor, I figure the base voltage will be around .00265A*220Ω=.583v at the emitter, so -3v + (.583v+.7v) = -1.283v at the base. So the bottom resistor will have 1.283v across it and the top resistor will have 4.717v across it. And since we know the current, 1.283v/.000133A=9,647Ω and 4.717v/.000133A=35,466Ω. And that 1.283v leaves plenty wiggle room for my .5v pk-pk input signal (I used 47k and 12k, close enough).

At this point, the input impedance is too low for my signal, but I tested the circuit anyhow using my signal generator (that can drive that easily without voltage drop), and for some reason, when I do, the signal looks great until it gets to the final stage where the output is clipping at just under 2v pk-pk.  I was expecting just under 4v peak to peak.  Did I do something wrong?  Are these S8050 and S8550 amazon transistors junk?   Thanks!

[magic]

the signal looks great until it gets to the final stage where the output is clipping at just under 2v pk-pk.

for bothering to find out what exactly goes wrong.

The likely reason is that your 1kΩ resistors aren't supplying enough base current to the output transistors when the output is close to the rail and there is very little voltage across the resistor.

You could try a lower value and it should improve output swing slightly, but a better solution is so-called bootstrapping. Split the resistor in half, 2×470Ω, and connect a capacitor from the junction to the output node. See here for an example of how it's done to drive the NPN side, you will need it on the PNP side too.

Given large enough capacitor, it works fine for AC and enables almost rail-to-rail output, but it doesn't work for DC because the capacitor will eventually discharge. Another option, also good for DC and extremely low frequencies, is to replace those resistors with active current sources, like current mirrors.

[moffy]

Looking at the datasheet for the S8050, it has a minimum specified hfe of 45, that is what your calculaions should be based on.

[antenna]

Thank you both for the replies! Awesome advice, I will definitely try the bootstrapping technique and base my calculations on the minimum hfe.   I wish I could try it tonight, but getting ready to leave in the morning, so it will be Monday before I can give it a try.  I will come back and let you know how it worked out!  I wish I could do it right now because now I am excited to try it again!

Again, many thanks!

[magic]

Datasheet hFE specs are typically highly pessimistic and have no relevance to a one-off build where you have already measured the particular specimens you use.

The only gotcha to possibly worry about is that hFE depends on collector current. It may be 200 at a few mA, but it may be less at very low currents or at currents close to the transistor's limits. You could put together a simple test circuit to measure it, for example make your current circuit output the highest voltage it can and measure voltage drop across 1kΩ and 1Ω to calculate the two currents and β.