Schematic would help.
I have never seen, used or needed that many vias on any (non-radio) board.
What is the layer setup? Looks like two layers? Polygon fill seems to be missing?
Right-0! Attached is the schematic for the board. I've also attached a sim.
Definitely need a schematic, as I can't even identify an input decoupling cap (?!).
See attached. Also, do you mean adding a cap on Vin? This latest board is being updated because it was diing out in the field. We believe there are some unexpected transients on Vin (connected directly to a lead-acid powering other things) but we weren't able to see any here in the lab. But I've read that it would be a good idea to add an ESD cap on the input. Probably should have added that
![Sad :(](https://www.eevblog.com/forum/Smileys/default/xsad.gif.pagespeed.ic.L3FGyzQrjB.png)
Is Q1 supposed to cut off the Vin? Why not simply use EN/SHDN pin?
Is that SMD thing between U1 and L1 supposed to be input cap? Is C2 the output cap? Looks way too small for the purpose
What is Z3 even doing? Is it supposed to be TVS or is it reverse polarity crowbar? Ditto Z2, certainly not actual zener right?
Thanks for asking - these are good questions.
WRT the EN/SHDN pin, the way these switching iC's work is that they have an internal fet that connects the output of the inductor to ground to build up the mag field which then opens and the voltage across the inductor + your input voltage ends up on the output. When the IC is shutdown, it simply disables the switching of the fet - but the input voltage can still be seen on the output and draw current. An IC that proberly disconnects VIN from VOUT would have a feature like "true shutdown". In any case, Q1 is a highside switch to actually cut vin from vout.
Yes, between L1 and U1 C1 is the input cap. C2 is the output cap. Both are 0805 pkg.
Z3 really should be a TVS diode I think but no it is unfortunetly just a plain old 15V zener. I'm hoping to swap it out for a TVS after a bit more testing. It's supposed to clamp transients on Vin. Here you can see of Z3 effect on a 30V pulse before and after adding it in
https://imgur.com/gallery/h54cdK3. It clamps it down to 20V and after repeated test, this ic is still kickin (absolute maximum input voltage is supposed to be 16V for U1) but ideally it would clamp down to 15-16V. Z2 is actually a 10V zener. Again it's to clamp the gate voltage since it should not exceed 20V.
This is the second iterration of this board. We were having troubles with Q2 and U1 diing previously. After poking around, our best guess was ESD (shit answer) or a transient that we weren't able to replicate in the lab. We increased the gate resistor of Q2 from 10ohm to 10k and added a 10V zener on it's gate. And also added the 15V zener across Vin... Whomp Whomp.