The voltage across a inductor or a long conductor as one might call it, is:
v(t) = L * di(t) / dt
So the voltage across it seems limited using an ideal switch by di, delta current. In the case of an ideal switch and the boost circuit, the charging of the capacitor would "reverse" delta current for a moment. Going from no current to some charging current (and ending in no current again).
For consistency's sake -- which circuit, and component, are we talking about here?
For the main filter choke, notice that v(t) is always perfectly constrained by diodes or switches. Therefore di/dt is always well defined. In particular, the voltages are piecewise constant, and the integral of a constant is a diagonal line. Hence we get a triangle current waveform.
The stray inductances have a harder time, with V and dI/dt defined by the switching action.
An energy argument suffices to reason about switching losses from these reactive components (stray L and C). Their current/voltage always goes between peak and zero, every cycle, and there is no conservative sink for that energy; therefore it is dissipated, through whatever resistance is available (might be their own internal resistance (shown on my equivalent diagram), external snubbing, or in the transistor).
(There are conservative snubber circuits, which recycle or "stir" their energy back into the supply, at least in part. Though they aren't as easy to use as one would hope. Alternately, a resonant circuit can be used: some energy leftover from the previous cycle pushes the circuit into a state that is ready to switch with very little loss (ZVS); the downside is, juggling that leftover energy requires tricky timing. It's a lot harder to reason about the V/I and control characteristics of such circuits, so I don't suggest we cover them here, at least just yet.)
However in an non ideal switch (mosfet) the initial current after opening would not become zero. Some current still flows and is wasted, even if the inductor was just a conductor without inductance.
However in the case of a inductor the delta current starts generating an extra voltage, that is also wasted in the mosfet. In fact all energy could be wasted if the boosted voltage would be too high or the mosfet opened too slow or the charge current was too low.
My intuition says it's best to have it opened as fast as possible. But that would also mean a small dt and large di, thus higher momentous voltage. So not completely obvious..
I'm not exactly sure what events you're referring to.
So, switching terminology maybe isn't great here. It also doesn't help that a real (mechanical) switch, is actually incredibly complex when you zoom in on it, at short time scales -- you get fast and often repetitive contacts, arcing, contact bounce, and a huge on/off ratio (e.g. TΩ+ off, <mΩ on).
Naively, it would be nice to have something that's just... magically "on" and "off" from one instant to the next. This is impossible in the real world: current flows propagate at the speed of light, at most. Indeed, the parasitic terms in the diagram, are a low-frequency modeling of that fact -- and, obviously, a greater distance means a longer response time, which is very roughly why inductance and capacitance scale proportionally with length.
So, there are fields and waves and propagation at work here, and we do need to be careful that, whatever model we're working with, it's not losing sync with these facts.
So the parasitic elements, are modelling the system to some degree of approximation, and as long as our model and expectations remain consistent with that approximation, we're fine.
Which is all to say -- yes, in general, faster switching is better, but:
1. we are limited by the approximated parameters in the system, so that we shouldn't try to go faster than they can allow, lest we release the magic smoke; or
2. at some point, we might be asking a question that cannot even be answered with this model. This isn't actually even imaginary anymore: the new generation of power GaN devices, are fast enough that we can potentially excite new resonant/wave modes of our circuits, if we use apply them carelessly, to circuits unsuitable for them -- in which case, if nothing else, we must revise our model, but we might even have to revise it so far that we're better off using a different approach (instead of L and C elements, transmission line elements; or even full transient wave simulations -- which are quite doable, it's just the tools to do so are rather pricey!).
The equivalent form of #1 is that, if we want to switch faster, we need to construct a circuit which has parasitics small enough to behave.
Anyway, modeling of switches -- SPICE takes a reasonable approach here, modeling an ideal switch as a variable resistance. The ratio is typically smaller (say 1mΩ to 1GΩ), and it changes smoothly, typically with a gain factor relative to the input signal, which itself changes smoothly (SPICE typically requires smooth equations to produce solutions -- some hacks are used to deal with situations when they aren't smooth, but they may not produce great results, in terms of accuracy or speed or stability). This still isn't a great model for a MOSFET, but it's at least a starting point.
With smooth changes, we also have smooth, and finite, dV/dt and dI/dt.
So to explain the post above a bit further.
When we look at the graph below, to my understanding at the rise of the inductor voltage (red trace - 5V) everything below 30 V is wasted energy. It wouldn't surprise me if it was directly related to the area beneath the curve. So in this case not a large proportion.
However its a large inductor ( 
I almost wrote conductor again) and the charge current is probably high.
So, also not sure what you mean about wasted energy -- but if you're counting it the way I think you are, don't forget the falling edge and the ringdown. There's about as much energy there, too! And again, when the transistor turns on, discharging the node capacitance to 0V, some energy.
If you look very closely at the drain voltage rising edge, you'll see it rises along a curve. If you also plot drain or source current at the same time, you should find the current doesn't actually drop much at all. We can make a cartoon diagram like this:
https://www.researchgate.net/profile/Mohamed_Salem47/publication/325487018/figure/fig2/AS:633301366759429@1528002220169/Current-and-voltage-waveforms-of-hard-and-soft-switching-at-turn-on-and-turn-off.png(not sure how well this embeds from the forum, I'll just leave it a link..)
In the conventional case (what we're discussing), drain voltage is in blue and drain current is dashed (left). At the moment the transistor
begins to turn on, its current draw increases slightly (from zero), discharging node capacitances. In the case of the boost or buck circuit, this includes charging the diode capacitance, which returns through the switching loop's stray inductance. So at the instant of turn-on, we have an LC circuit, and the energy loss associated with those capacitances. (This loss is typically dissipated in the transistor.)
Slightly later, current begins to rise in earnest. If the filter choke is carrying no current (was fully discharged last cycle), well, it starts from zero of course. If it hadn't finished discharging, then the diode is forcibly turned off (hard switching, reverse recovery); in the process, the transistor has to carry at least the full load current, and this current again is carried by the switching loop, thus we will incur losses associated with that load current and the loop inductance.
Finally, everything settles, drain voltage is small, load current is increasing gradually (filter choke dI/dt at applied voltage).
Actually, these plots are for a nearly resistive load, not an inductive load. In the inductive case here, the voltage curve may not begin to drop until the current reaches full load level!
Likewise on turn-off, the voltage follows the dashed curve: voltage rises first, and then current falls (again, overlapped even more than shown here).
With real parts, the drain capacitance does tend to help out. In your simulation, the gradual toe-in for the drain voltage waveform occurs most likely because drain capacitance is very high when Vds is very low. Cdss is very nonlinear -- its value depends on Vds. This skews the waveforms significantly, so that transistor current may have a chance to drop nearly to zero, while the drain voltage has risen only modestly -- and consequently, drain dV/dt can be very high indeed!
But again, this can be dangerous, the loop needs to be designed properly so everything operates within ratings.
This might matter when trying to design a booster not with primary a high frequency per se, but with a high duty cycle of the inductor.
A way to do that is having it timed by the inductor response. This could lead to a much higher frequency of shorter pulses. And thus more losses when driven to slow.
Don't worry about the control method too much. There are, of course, standard approaches!
First a terminology: when filter choke current reaches zero between cycles, its current is discontinuous. This is called discontinuous conduction mode (DCM).
When current is continuous (not allowed to reach zero), it's CCM (continuous conduction mode).
When it reaches exactly zero, it's BCM (boundary conduction mode).
Your suggestion is essentially to use up all the energy stored in the inductor, every cycle. This sounds effective enough. Be careful, though: it takes longer to charge up to higher currents, too. A BCM boost converter must operate with frequency inversely proportional to load current. The significance of this may not seem all that obvious, but it leads to a cluster of downsides:
1. We need very high peak current ratings for the inductor (twice the average input current);
2. Input and output filters need to be designed for the worst-case (full throttle, lowest) operating frequency;
3. The switch and control needs to be designed for worst case (low throttle, highest) frequency, and may end up dissipating a ton of power by itself, even if the output side is well behaved (i.e. operating in BCM quasi-resonant);
4. Losses are quite high, due to the high peak current and wide frequency range. Conduction losses in the switches and inductor (at high peak currents), and core loss in the inductor (which tends to be worst at low frequencies).
5. Inevitably we won't be able to maintain BCM (when load drops arbitrarily small). We still need to deal with DCM.
BTW, controls designed for this type of operation, do indeed sense inductor current. A cheap way to do so, is either to capacitively couple the voltage (sensing the down-swing after current falls below zero), or to add a secondary winding and just measure that voltage (again, sensing when it drops below zero). The impedance of this path can be large (10s, 100s kohms) so the losses are small.
Such controls are always complicated by the fact that BCM can never be perfectly maintained, so have some way to deal with DCM operation at light load. BCM is particularly attractive for PFC (active power factor correction) circuits, because it uses peak current control to draw constant input current, but these always perform poorly at light loads.
Tim
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