Boost converter -2 speed ramp

[HendriXML]

So I first improved the setup.

The wire I used had significant resitance and capacitance. I measured them, will report on them later.

Now I used the attached adapter (connected to a T-splitter, one BNC to scope), on wich the inductor could be screwed on. (Those are screw terminals as well)

I measured the resitance/capacitance of it: much better.

Next a made a new graph with a wider pulse. In the end the signal reaches very close to zero. But it takes a lot more time than the simulated a ideal inductor.

I also simulated a inductor of 75% of the calculated inductance. That matches the curves much better at the beginning to mid of the voltage.

I still think only measuring 25%-75% of the voltage range will lead to a better calculation of the inductance. Now the lower voltages are too influential.

(But something tells me I won't be able to get the math right  )

Also the discharge spike seems to behaves better. So maybe I should shift focus to that one.

[HendriXML]

Found a nice video on driving power mosfets:
https://youtu.be/of_v2N5f788

[HendriXML]

I now used the discharge wave to calculate the energy transfer at each sample. The summed energy was then used to calculate the inductance.
Which should be around:
46,5 uH

Then I simulated the discharge curve using that inductance to compare the real vs simu (ideal).

I'm pleased with the result! This can very much be used to calculate inductances of (large) inductors and in a way that matches the application of energy transfer.

When using that inductor value, the charge simulation also matches quite nicely with the charging wave.

Using the discharge curve has the benefit of an energy calculation V*I*dt  when they're both high, and when they're both low. So the values near ground (wich seem a bit off) are not that influential.

[T3sl4co1l]

Could you post your data series (e.g., Excel, CSV would be fine)?

Tim

[HendriXML]

I have got a xml file. It's what I load into Excel.
Made a how to import over here:
https://github.com/HendriXML/XMLScripts-Project-WaveCapture/wiki/Making-a-Excel-graph-step-by-step

I can also produce a csv file, but that'll have to wait until tomorrow.

[HendriXML]

I converted the xml files to csv files.

I'll try to curve fit the discharge one in Maxima.

[HendriXML]

When fitting the discharge curve, Maxima takes:
49.04105718614097 uH as the best match

However, maxima doesn't know the voltage near gnd are less influential energy wise. In my opinion thus not a better fit..

[T3sl4co1l]

Interesting, it definitely drops faster at the outset than later.

What kind of inductor is it?

Tim

[HendriXML]

One inductor has a ferrite core cylinder style and the newly calculated "larger" one probably also, but ring style.

This inductor which I used in the circuit and will continue to use is now measured, it's calculated inductance is around 275 uH

[HendriXML]

Previously I did a function fit with discharge voltage. But that won't weigh voltages related to energy.

So each sample got its calculated instantaneous power and I fitted that data set to the instantaneous power function.

With my method of summing the instantaneous power of each sample * time, I got a inductance of: 46,5 uH

The function fitting results in: 46.835 uH

The diagrams speak for them selve. I also really like the vector output in pdf format. For this reason I will drop Excel as my primary the tool to make graphs.

[HendriXML]

I went sketching around the voltage booster circuit. I used concepts on Android, wich needs to mature some more to be really handy. (Things like grid support).

The first thing I added was the energy transfer. When doing calculations this would be most important.

Another this I added to the sketch was a stare diagram of 6 states of sinking/sourcing the gate of the power mosfet.

I separated hard (low Z) / soft (high Z) driving. And then I mapped the transition conditions to voltages that can be sensed. Each transition should latch some of the driving transistors.

For me this is not an example of a successful attempt,  but rather an example of how this approach can end up requiring a lot of components. Such an approach might turn out to be better when designing an IC. 

Also it might be though to get the conditions reliable (input offsets comparators). Also the cycles should be self starting and suspendable. (Haven't got that one figured out yet)

In "software design" this all could be implemented in less time than it took to draw. In electronics design there're a lot of caveats and real world limitations.

Also every extra component one needs, comes with a cost.. Writing some lines of code extra doesn't.

At least I've got a better understanding of how feasible this approach is/was. The method of charging the inductor this way also adds neg spikes/noise to the supply voltage.. I think that was mentioned..

[T3sl4co1l]

Hm, what purpose does the soft gate drive serve?  It's not clear what the timing is supposed to be, if that's all supposed to happen during commutation, or spread out during a full switching cycle?

(Also, your PMOS are backwards!)

Offhand, there are very few applications for that.  The first that comes to mind, is large industrial drives, to implement fault protection.  Namely, with say a 1200V 600A IGBT, in the event that short-circuit current should happen to flow, load current rises rapidly, towards a peak of say 4kA.  If this were turned off at the normal rate (of gate drive current, and resulting output dI/dt), the peak voltage would destroy the transistor (IGBTs are less robust to avalanche breakdown, than MOSFETs are).  So, often a protection circuit monitors either load current or transistor voltage drop, and when a limit is exceeded while the gate voltage is high, gate drive is disabled, and a slower turn-off transistor is enabled.  Switching loss is quite high of course (maybe the ~4kA decays over a microsecond), but it's a one-time event, after which the control receives the fault signal and disables operation immediately.

Arguably, RF amps and drives might be similar in a way, but their drives are usually furnished by a matching network, and anyway, for some applications, the gradually-changing gate voltage is still detrimental, there's just no better way to do it (e.g. class E amplifiers at 100s MHz, or GHz for that matter).

You may find a similar approach is more convenient for switching circuits, too.  For example, a ferrite bead instead of a series gate resistor, furnishes the same RF resistance required to suppress oscillation, and dampens the rise/fall waveform, but also saturates during large peak currents so that the bulk of the edge is not slowed, only delayed (and this delay really only amounts to a ns or a few, most of the time).

Or a R || (R+D) network, which allows asymmetrical rise and fall times.

Tim

[HendriXML]

Hm, what purpose does the soft gate drive serve?  It's not clear what the timing is supposed to be, if that's all supposed to happen during commutation, or spread out during a full switching cycle?

The timer was added to:
Separate things from happening at the same time.
Control max frequency.
And maybe start/stop the cycles.

However I didn't figured that out yet. Also some conditions could be dropped if another condition is always later, such as a timed "event" vs discharge of conductor.

The soft gate driving was added to ensure the state of the gate of the power mosfet, before "hard" driving it the opposite way (without much cross conduction).

Something a mosfet driver normally handles. But I was wondering if it could be part of the cycle. The benefit would be loosing effect of the ds-capacitance of the opposing driver mosfet. (Edit: the hard driving mosfets still have ds-capacitance) Using bipolar transistors might not fully close the mosfet, I would need to test that. From what I know is higher gate voltage is lower Rds, even above threshold.

However this 2x2 driving adds extra states to the cycle, which also need "transition conditions"  making it more complex. But its not the design complexity that holds me back, but rather the implementation (and reliability).

[T3sl4co1l]

Just concentrate on making a stable and reliable loop.

Your basic peak current mode is:
State 0: Gate low.
State 1: Gate high.

0 --> 1: triggered by independent clock oscillator, or timer.
1 --> 0: triggered by switch current exceeding the threshold.

Only need one flip-flop to count this out.

If timed, timer is started by current threshold.  If independent, you can still model it as a timer, which just restarts itself by the same 0-1 trigger.

Typical hardware implementation would be a clock trigger pulse which is very short, into an R-S flip-flop; or a normal width pulse that clocks a D-type flip-flop with D = 1, PRE = 0, and RST = current threshold.

(If we wished to add incremental steps to describe the switching events themselves, we could; but we learn nothing, because there's no input to interrupt such an event, they always transition immediately from one to the next state.  It'd be a trivial expansion.)

This, is so simple it's almost trivial.  The actual interesting stuff happens in the analog domain.  Which, is continuous state, not easily represented by an FSM diagram, so I won't attempt to create one...  We can model it as a system of difference equations (with equivalence to reality as dt --> 0) and play around with it easily enough in the DSP (discrete time) domain, but it's not necessary to do so.  (It would, of course, if we were doing a full digital control.)  (Such LTI networks are easily solved in closed form, and we usually approach it from the frequency domain, where the system manifests as a rational polynomial.)

Tim

[HendriXML]

I'll have to give it some thought.

Meanwhile I calculated the awg's internal resistor to the highest accuracy (with accuracy indication) I can manage.

I also remeasured the discharge curve, but now using 7 volts. This way I could set the scope to 2V/div and have a bit more resoltution.

The voltages where also validated and near enough, soo I think its the best measurement of inductance I can produce.

Will clean the Maxima code some bit and post it as well.


Measured values
  ohmInductor                             : 73,50 mΩ ± 200 μΩ
  ohmWireAndDmm1A                         : 212,50 mΩ ± 200 μΩ
  ohmSingleWire                           : 25,30 mΩ ± 200 μΩ
  ampLoadcurrent                          : 99,22 mA ± 100 μA
  voltSupply                              : 4,99364 V ± 200 μV
intermediate
  ohmTotalResistance                      : 50,33 Ω ± 50 mΩ
provides
  ohmInternalResistance                   : 50,09 Ω ± 50 mΩ
  ohmInductorLoadResistance               : 50,16 Ω ± 50 mΩ

[HendriXML]

The measured/calculated value new style is:
By energy summing: 305.77 uH
Function fit: 298.66 uH

I attached the datafile + wxMaxima script in a zip file. I had to figure some stuff out which might benefit others as well.

wxMaxima can be dowloaded at:
https://sourceforge.net/projects/maxima/

[T3sl4co1l]

Looks pretty linear.

[HendriXML]

I think I may have found a way a traversing states in a reliable way. I know it will become somewhat of a monstrosity. But at least going through the design fase would be a good learning experience. Basically it would be a time based cycle like a 555 does, but with logic to speed some fases up. The idea is to pull down voltage dividers which discharge the timing capacitor to a certain voltage using a diode. This will bring the cycle rapidly through the next fases.
The sensing of a discharged inductor will not force the timer voltage, but speed it up. So that the final fases are always processed, but more rapidly.

[HendriXML]

Looks pretty linear.

This zoom in will give a better view.

[HendriXML]

I've thought some more about the differences between software system and electronic system design.

In software when you read a certain value / state one gets a copy of that state (referenced stuff aside). In (analog) electronics some value / state is most likely changing. Thus changing the decisions that where based on it as well. If one doesn't like that, a state needs to be saved in something like a capacitor or flip-flop.

In software this difference could be mimicked by using a (root) event handler. Getting the values/states of a certain moment. This handler would "be stateless", when something from a previous event is needed to make a decision,  some state would need to be saved. This is off course easily done in a global variable. However for mimicking the behavior it would good to pass that saved state, along with the other values/states through another handler.

I'm not sure yet, but I think I could "model" the monstrosity I came up this way. It doesn't need to actually simulate the circuit, its more about modeling component's and interactions.

As a software developer I made my share of diagrams and stuff, but most of the time just by starting coding the solution would unfold by itself.

So that would be one reason for this exercise, the other would be to experience the differences/similarities between electronics design and software design.

[HendriXML]

Did some drawing on the monstrosity circuit

Using this I'll try to fill in the gap between the "triggers" and controlling the 4 driver mosfets using the mentioned coding.

I've not really used logic IC's before, so I'm wondering how much of them would be needed.

In that process things like how a reset would actually function should come to light as well.

[HendriXML]

I had a play around with modelling the circuit in Delphi/Pascal, without filling the gaps.

For me the modelling has benefits:

• Things get identifiers, which are "spell checked", in other documents one could refer to them
• Its easy to add comments
• The document in the IDE is navigatable
• There's usable type checking, syntax highlighting
• Difference between "static, stateless, statefull" can be expressed
• Logic and interactions can be expressed
• Logic can be tested running the program

Does it modell every thing? No, but that's the case with a lot of modelling techniques.

So next step would be filling in the gaps (line 80). One thing that needs modelling too, is the reset of the ramp and the effect it has on the logic side.
(Some resetting indication needs to be introduced.)

[HendriXML]

I added the logic needed to control the driving mosfets.

The used boolean expressions can be implemented by logic gates. Before resetting the ramp an IsResetting signal should be "implemented", which could be unset when the rampvoltage is at its highest level again.

I don't think the circuit is self starting yet. Which I think can be solved by converting it to a ramp up instead of down.

[HendriXML]

One reason to have a ramp down was the ability to set the timer cap voltage to a certain value, speeding up the traversing of states.

Using a pull down resistors and a diode wasn't really a fancy option, but with a ramp up,  things got even less fancy.

The constant current for the ramp will be done using an opamp with some reference voltage. So one way to speed up the traversing of states would be to implement a way to switch to a larger constant current, speeding up the timings a lot.

The stopping this "speed up" could be done by using the output of the triggers and digital logic.

The circuit would be designed to function without speed ups, but because of "margins" that need to be taken it would not be able to transfer maximum power.

I'm starting to like this monstrosity  It may not be the best way to design a boost converter, but it gives plenty of opportunity to investigate and trouble shoot parts of it and learn from it.

Also for the sake of self education I'm not designing for low power consumption anymore.

[HendriXML]

The circuit needs a 2 speed constant current source to charge a capacitor (resulting in a 2 speed ramp, wich needs to be resettable.

I think the attached circuit will do this task.