Using a FET to drive super bright LED

[ryanmills]

N Channel FET Datasheet: https://www.onsemi.com/pub/Collateral/NTF3055L108-D.PDF
LED Datasheet(Vf 3.25, 60ma): https://everlightamericas.com/index.php?controller=attachment&id_attachment=727

I could use some knowledge passed my way. I have found some conflicting examples on driving FET's with an Arduino (5V Logic). So my question has two parts, I know I should have a current limit resistor between the GPIO and the gate on the FET, however I can't find the math on how you decide the right value? In my case my selected FET (datasheet above) the gate voltage is 5V, the same as the GPIO logic level, do I just slap 30 ohm in front and call it a day? I saw another example that had a 3.3k resistor and that seems high?

Second question, it's my understanding the drain voltage has to be higher than the gate, but how does that come into play with LED's as a load, in my case I'm running 9 volts into the LED's but I also have the current limiting resistor and the loss across the LEDs. The FET was picked because I plan to run a lot more LEDs in parallel and need the 3A, however would that FET even work? Or do I need to find a FET with a lower gate voltage?

Sample circuit:

[ajb]

You don't need a current limiting resistor on the gate of a FET.  That's BJTs that need their base current limited.  Putting a resistor in series with the gate of a FET is primarily about controlling the speed at which the FET turns on and off (which it does by limiting the current, but only during switching).  Putting a small resistance in series will generally reduce EMI by slowing down the voltage/current slew rate at the switching node, but at the expense of increase power dissipation as the FET will spend more time in the region where its drain-source resistance is neither extremely high (fully off) or close to zero (fully on).

The gate-drain voltage isn't really significant here, it's entirely valid for the drain to be at zero volts--in fact it will be very close to zero volts when the FET is on, and this is the normal condition for a low side switch!  The gate must be at a positive voltage relative to the *source* in order to turn the (N-channel) FET on.  P-channel FETs need the gate at a negative voltage relative to the source to turn on.

[ryanmills]

You don't need a current limiting resistor on the gate of a FET.  That's BJTs that need their base current limited.  Putting a resistor in series with the gate of a FET is primarily about controlling the speed at which the FET turns on and off (which it does by limiting the current, but only during switching).  Putting a small resistance in series will generally reduce EMI by slowing down the voltage/current slew rate at the switching node, but at the expense of increase power dissipation as the FET will spend more time in the region where its drain-source resistance is neither extremely high (fully off) or close to zero (fully on).

The gate-drain voltage isn't really significant here, it's entirely valid for the drain to be at zero volts--in fact it will be very close to zero volts when the FET is on, and this is the normal condition for a low side switch!  The gate must be at a positive voltage relative to the *source* in order to turn the (N-channel) FET on.  P-channel FETs need the gate at a negative voltage relative to the source to turn on.

Thank you, that helps a ton. I'm a mechanical engineer who wishes he was smart enough to be an electrical engineer.  Without knowing the nuisances, of the different types of transistors the examples seemed conflicting. You cleared up everything.

[Buriedcode]

I'll add the the excellent reply above.  MOSFETs are essentially voltage controlled switches/resistors (fully on, gives it the very low Rds quoted in datasheets).  So in static conditions, with a fixed voltage on the gate, the gate essentially consumes no current - unlike a bipolar transitor which is a current controlled switch.  However, the gate has capacitance, which must be charged/discharged to change the gates voltage. This means that whilst low duty switching - like switching things on/off over periods of seconds/minutes, a high gate capacitance isn't really a problem (unless it charges so slow and the drain/source current so large that it dissipates significant power).  But for fast switching as PWM or switched mode power supplies, the gate capaitance becomes and important factor and can be the limiting factor.

So how fast will you switch these LEDs on/off?

[ryanmills]

I'll add the the excellent reply above.  MOSFETs are essentially voltage controlled switches/resistors (fully on, gives it the very low Rds quoted in datasheets).  So in static conditions, with a fixed voltage on the gate, the gate essentially consumes no current - unlike a bipolar transitor which is a current controlled switch.  However, the gate has capacitance, which must be charged/discharged to change the gates voltage. This means that whilst low duty switching - like switching things on/off over periods of seconds/minutes, a high gate capacitance isn't really a problem (unless it charges so slow and the drain/source current so large that it dissipates significant power).  But for fast switching as PWM or switched mode power supplies, the gate capaitance becomes and important factor and can be the limiting factor.

So how fast will you switch these LEDs on/off?

Thank you, the FET is acting as a switch not PWM but I will keep that in mind, there was a chance I would add PWM so I could control brightness.

[james_s]

Even with PWM the FET is still acting like a switch, it's just switching a lot faster. That is the point of using PWM vs linear mode, with PWM the switching device is always either fully on or fully off, ignoring the transition time. It is not sitting in the linear region acting as a controlled resistor.

[TimNJ]

For that particular MOSFET, with small input capacitance (Ciss), I think you are fine without any series gate resistance...However, just to keep in mind, GPIO pins don't usually have a huge current capability...and charging up a MOSFET's gate capacitance requires a brief, but relatively large, pulse of current. Hypothetically could cause a sag on the VCC, and/or  cause some damage to the GPIO's output transistor(s). I think Rg=100ohms probably would be fine, and I think it's generally good practice to at least make a provision for the gate resistor, even if it's just 0 ohms.

Maybe more important is to put a pull-down resistor from gate to source, if you are interfacing with a uC GPIO pin, as sometimes there are undefined, floating states during start-up, etc. If you put ~10K from gate-to-source, this will make sure the transistor doesn't turn on accidentally.