Making this H-Bridge run without shoot-through

[hkBattousai]

I'm trying to set up a simple H-Bridge. I designed the circuit above. Would it cause any shoot through in the moments of transition? Can you please confirm if it is OK or not?

[nickm]

Your totem poles are switched around.  The NPN needs to be on top and the PNP on the bottom.  You should simulate to find out.  A good way is to add a gate resistor on each mosfet between 1 and 100 ohms which will depend on your application.  This will slow down the turn on of the mosfets a little bit.  Then you put a schottkey diode across the gate resistors so that they are bypassed when they are turned off.  What this does is turns off the fets fast, and after a short delay the other pair will turn on which should accomplish the deadtime you're looking for.  You will also want to move R4 before R1 because with it on the base its voltage will never rise above about 0.7V and that totem pole won't turn on. 

[NiHaoMike]

You won't get enough drive voltage on the high sides.

[hkBattousai]

Your totem poles are switched around.  The NPN needs to be on top and the PNP on the bottom.  You should simulate to find out.  A good way is to add a gate resistor on each mosfet between 1 and 100 ohms which will depend on your application.  This will slow down the turn on of the mosfets a little bit.  Then you put a schottkey diode across the gate resistors so that they are bypassed when they are turned off.  What this does is turns off the fets fast, and after a short delay the other pair will turn on which should accomplish the deadtime you're looking for.  You will also want to move R4 before R1 because with it on the base its voltage will never rise above about 0.7V and that totem pole won't turn on.

OK, let me list them one by one. Please tell me if I understood one of them wrongly.

• Totem pole transistors will change places (I didn't get the reason for this though. Wouldn't it also work like this?)
• A gate resistor for each MOSFET. A 47 Ohm should suffice I think.
• Shotkey diodes parallel to the gate resistors. Which way should they point to? How do they help the MOSFETs turn on faster and more delayed?
• R4 will be connected to the 555 directly.

You won't get enough drive voltage on the high sides.

Yeah, I think so. Las time I used a bridge driver IC, so it was boot strapping internally. This time I think I should change the high side MOSFETs with P-channel ones, and the circuit topology accordingly.

[T3sl4co1l]

You need something like this (use LM393 for the comparator, that was a schematic error):

http://seventransistorlabs.com/PWM_Generator.pdf

Note that the logic supply must be higher than the load voltage, to drive an H-bridge this way with all N channel MOSFETs.

Shoot through is necessarily present in this circuit, but because this circuit was designed for a current limited power supply, that's a good thing.

Tim

[hkBattousai]

This is the new form of my circuit:



I replaced the high side MOSFETs with P-channel ones. Now I'm driving each side's (Left and Right) high and low MOSFETs from the same signal. Because high side MOSFETs are P-channel, so they will only turn on when their gate is LOW. And the low side MOSFETs will turn on when their gate is HIGH. Will it work, or did I do a bad thing?

[nickm]

Reverse the direction of the diodes on the N-channel fets. 

The gate resistors and the input capacitance of the mosfets form a lowpass filter, which will delay turn on and turn off.  The diode in parallel with the resistor allows the fet to turn on or off without delay, depending on the direction of the diode. 

On the high to low transition the n-fet will turn off fast and there will be a delay on the p-fet since it has to conduct through the resistor.  On the low to high transition the p-fet will turn off fast and the n-fet will be delayed turning on.  So it looks like it might work.

[NiHaoMike]

What's your supply voltage and the threshold voltage of the MOSFETs? It can work pretty well if the threshold voltages of the high side MOSFET and low side MOSFET add up to less than (or close to) the supply voltage. A similar circuit is actually used in many small BLDC drives, though obviously usually 3 phase.

R3 and R4 can be replaced with direct connections. DRL and DLL should be flipped since you want to speed up the turn off, not the turn on.

[hkBattousai]

OK, DLL and DRL will be flipped. I note that.

The source voltage will be 15V. I can even make it 30V if required. I haven't chosen the MOSFETs yet. I will choose them accordingly. What threshold voltage should I prefer while looking for the MOSFETs?

[NiHaoMike]

15V is near the top range of where such a simple design will work. Something lower like 12V would increase the chance you'll be able to get it working. That said, I have opened up an old audio amplifier (running on about a 30V supply rail) that used a similar configuration, but the high side level translation was done with capacitive coupling.

You'll want "standard" threshold MOSFETs, not the logic level ones.

[hkBattousai]

OK, thanks. I will look for a solution. I will post my new circuit here as soon as it is ready.

[T3sl4co1l]

The PMOS may not ever turn off with such weak drive.  You'll also have about a 10V range of guaranteed shoot through; this will either screw with the circuit (the supply shorts out to ~4V and the 555 generates glitch pulses) or the power supply (if it's not made for current limiting), and given the slow switching speed, may destroy the transistors anyway (if the power supply is heavily bypassed or capable of high current capacity).

The series gate resistors and diodes are doing absolutely nothing; the complementary emitter followers already look like about 50 ohms source resistance.

Tim

[David Hess]

If you generate complementary drive, then a set-reset latch followed by a pair of delays can be used to make it non-overlapping.  There are ASICs which provide this function and MOSFET drive.

[hkBattousai]

Hello guys, I'm back.

I made big modifications in my circuit. I did something unusual, but it is a sure-kill. I generated a triangle wave, and by using it, I created separate gate-drive signal for the both sides with a HUGE enough dead time among them. Is this design feasible? Please leave some comments.

[T3sl4co1l]

Dead time between left and right isn't the problem.  Dead time between top and bottom is the problem.  As shown, the top and bottom gate voltages are (more or less) equal, so any time the gate voltage is above Vgs(th) for the N channel and below Vgs(th) for the P, you're shorting out the supply.

And with op-amps generating the waves, not only will the crossover time be relatively long, the saturation voltage may not even exceed Vgs(th) for either transistor, so it never fully switches at all, it just sits there smoldering.

Tim

[hkBattousai]

Oh! OK, I admit, I'm stupid. I will fix it an post it its final form here soon.

[Fank1]

This is not a complete answer but look at TL494 before you use the 555.
It's a much better driver.

[NiHaoMike]

If you're trying to make a small DC/DC converter, you'll do better making a flyback converter.

[hkBattousai]

This is not a complete answer but look at TL494 before you use the 555.
It's a much better driver.

I liked Fank1's idea very much. TL494 or TL594 is very convenient for my circuit. So, I decided to use it.

My new design is below. I need your approval. Please tell me if still anything is wrong with it.



(Note: +VIN is just a little above 12V. It will be a bridge rectified and capacitor filtered form of 12V RMS AC voltage. And -VIN is just negative of it.)

[Fank1]

The biggest problem with this circuit is the way you are trying to drive the high side FETs.
The reference for them must be there own source not the source for the low side FETs.
That is the gate pulse must be applied between each FETs gate and source.
You need to used a special high side driver or gate transformers.

[hkBattousai]

Fank1, thank you for your reply, but I couldn't understand what you meant there. V_GS voltages of high side MOFETs were referenced to +12V (and now referenced +VCC as seen in the circuit below). Could it be that you forgot that the high side MOSFETs are p-channel? If I'm still wrong, please explain it to me by adding in more details.

The final form of my circuit with a few fixes:

[TMM]

For a low frequency bridge you could use an arrangement something like this:



The first stage (M1 and M3) will shoot through, with the shoot through current limited by Rlim. Shoot through in the the second stage (M2 and M4) is mostly eliminated because the gates can be discharge through the low impedance of the adjacent mosfet in the first stage, but must charge through Rlim.

Rlim needs to be optimised for the mosfets you are using to achieve a balance between shoot through current and dead time / slew rate.

[Fank1]

You are correct I did not look close enough.
I am puzzled by the 4 supply voltages.
Also just to correct the drawing the +12 and -12 are reversed on the capacitor bank.

[sfiber]

try to use darlington pair at the right side of the circuit in order to drive circuit with less current.