Zener/TVS for negative spikes

[dorimon1000]

hello , we have  a product where in our design 2 boards are connecting with pogo pins board A and board B. the pogo pins have +12V D- D+ and GND , the thing is , we experienced -8V on the D- data line and that is because the GND is the last pin to touch when the boards are assembled and since there is no complete loop , the loop closes through the D- pin (in the MCU the D- goes through pull down resistor). we have some mechanical solutions but the will require replacing connectors which might cause some other problems. we wanted to know if there is an option to do something with HW , maybe place a Zener or TVS that wont affect the data integrity and will be able to block the negative voltage.
the negative voltage is measured between the D- and the GND on board B while the GND is not connected yet.

I hope the explanation is clear enough , would love to hear your insights!
thanks!

[voltsandjolts]

I always use specific USB TVS diodes, such as ST USBLC6 for any USB connection. Whether they would handle the current in your scenario, I don't know.

[dorimon1000]

Yes TVS diodes are ok for usb but in this specific scenario its a negative voltage on the data line.. I found no TVS diode that can help with that..

[voltsandjolts]

With negative voltage on tha data line, the TVS I suggested just becomes a forward biased diode, clamping to -0.7V, depending on current.

[dorimon1000]

why would the voltage clamp to -0.7? doesnt it matter what is the voltage on the data lines ?

[PCB.Wiz]

Yes TVS diodes are ok for usb but in this specific scenario its a negative voltage on the data line.. I found no TVS diode that can help with that..

Parts like usblc6 have 4 diodes that bridge clamp to V+ and GND, plus a zener.
It will constrain the 'no GND' voltage.

However, is it not smarter to delay powering the whole thing, until you verify all pins connect?

Usually, the GND pin is deliberately longer to ensure first connect, and some designs use multiple GND pins, and verify a short between them, before powering up.

[PGPG]

why would the voltage clamp to -0.7? doesnt it matter what is the voltage on the data lines ?

It becomes not clear if the -8V at D- you describe is the intended voltage there or is the voltage you want to be clamped.
If it is voltage to be clamped then your reaction for information that diode clamps it is surprising.
If the negative voltage is intended there than you probably have to explain more detail what exactly is the circuit you describe.

Do your D+ and D- lines are USB communication or something else?

[dorimon1000]

I'll explain better. D- D+ are the USB lines . we experience negative voltage spike on the D- line when connecting the boards in a way that the +12V and D- arrive first. the -8V spike damages the USB driver in the MCU. we want to prevent that -8V on the line when it happens. I might not understand how the diode clamps the voltage to -0.7 as you said , if it does thats great news and would probably solve our issue. could you explain how the diode will clamp the voltage to -0.7V?

[PCB.Wiz]

I'll explain better. D- D+ are the USB lines . we experience negative voltage spike on the D- line when connecting the boards in a way that the +12V and D- arrive first. the -8V spike damages the USB driver in the MCU. we want to prevent that -8V on the line when it happens. I might not understand how the diode clamps the voltage to -0.7 as you said , if it does thats great news and would probably solve our issue. could you explain how the diode will clamp the voltage to -0.7V?

If either data pin tries to go negative, the clamp diode conducts and takes the majority of current, so the data pins cannot go more negative than GND by 0.7v.

Effectively, the GND pin will 'float' closer to the data pin. That should be easy to check in a unit.

[PGPG]

could you explain how the diode will clamp the voltage to -0.7V?

You have to understand how diode works, but it is the beginning of beginnings. I had to understand it when constructed my first detector radio receiver (I was 10 those time).
Starting from ideal diode.
You can describe ideal diode as the element just not allowing its one pin to have higher voltage than the other and having nothing against this first pin having lower voltage than the other. This is an exhaustive description of the ideal diode - it does not need to have any additional features.
Ideal diode used at input pin will clamp any negative input to GND (so to 0V measured against GND).
But real diode don't start conducting with 0V at it but need some voltage (typical silicon diode you can assume it is about 0.7V, if pulse have high current it will be bigger voltage drop depending on diode and current).
Your IC probably have such diodes inside. If it is damaged by pulse than external diode will help only a little as current pulse probably will equally divide between this external and internal diode. But if between external diode and internal diode there will be some resistor than you can calculate how much of pulse is going through external diode and how much through internal. Take for diode you use characteristic from datasheet and assume typical small signal diode characteristic for internal diode.