Boost converter is oscillating?

[Faranight]

Hi.

I am trying to power a boost converter (TPS61202, Vout = 5V, few mA load) from a high impedance power supply. I found an issue with this IC where the chip causes a sudden current surge upon powerup. I tested this on a lab bench PSU and found out that the surge only happens at initial IC powerup, but afterwards the IC will draw less than 1 mA of current when idle (no load). Unfortunately when this IC is connected to a high-impedance power supply (in my case a small solar panel with MPPT IC, Voc = 5V), the initial current surge seems to cause a voltage drop on the input rail which then causes the IC to reset due to undervoltage. Once the voltage recovers the IC will retry to power up and this will then cause a second current surge, and another one after that, and another, etc. The IC then oscillates between power-up and reset states and draws about 30 mA at input voltage 0.33V. Adding a large input capacitor doesn't seem to help because at this low voltage there's barely any charge stored on it. What would an easy way to fix this? Change the boost IC?

I was thinking about delaying the IC power up by adding a custom schmitt trigger circuit to the EN pin of the IC. This should allow the input capacitor to charge to about 2.5V before the IC is finally enabled and the surge current can be sourced from this cap. Otherwise, the IC tries to power up at input voltages as low as 0.3V. The only problem is that this schmitt trigger circuit must also be powered from the same voltage rail. Would something like the attached circuit work? I'm not sure because the opamp's minimum operating operating is 1.8V, and the voltage on the input rail can vary between 0 to 5V. Would the opamp be able to drive the line LOW fast enough before voltage starts appearing on the EN pin via the resistor divider network and activate the IC prematurely?

I found a semi-related thread on the TI forums.
https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/733216/tps61200-tps61200-draws-too-much-current-using-the-uvlo-function

[JackJones]

UVLO pin does basically what your circuit does, but unfortunately looking at the forums thread it just shuts VOUT off and doesn't turn off the IC completely in order to keep voltage at VAUX.

You could probably get away with a much simpler solution than what you're suggesting. Just put a resistor from VIN to EN and a capacitor from EN to GND. If you size them appropriately that will give enough delay to the EN pin for the input capacitance to charge enough.

[Faranight]

You could probably get away with a much simpler solution than what you're suggesting. Just put a resistor from VIN to EN and a capacitor from EN to GND. If you size them appropriately that will give enough delay to the EN pin for the input capacitance to charge enough.

Well... I already tried exactly what you're suggesting. The problem is that the EN pin has voltage on it when floating, so something inside the IC must be driving it high. Tying it to a resistor divider network between Vcc and GND isn't working as I had hoped. If I use resistors with very high values then they are unable to pull this pin low enough for the IC not to activate prematurely. If I use resistors with low values then I'm basically wasting lots of power in an energy harvesting application.

[Faringdon]

So youre source is high Z and when your vout is not in regulation, the TP61202 error amp is railed high so it sucks in as much current as it can….the volt drop from this high currnt draw across the source from that then takes down your vin, and the thing keeps resetting…..etc etc ad liberatum.
One way round this is to change to an input current regulated boost converter. Or an input voltage clamped boost converter…so it stops working when vin gets so low that its just about to reset the chip.
Or just put up with the kind of on/off behaviour and kind of “make it work” for you.
Can you not have another TPS61202, which is loaded extremely lightly, and all it does is power the main TPS61202?........
What size is the input cap at the output of the solar panels?
What is the maximum load on the boost converter?

A schem would help if you can.....though i know if you are in a big co, that even though  the circuit is "pretty standard and routine",   your companys (unofficial)  forum watchers will be upon you if you post the cct. Reporting you to the gaffer...(even though you posting this simple scheme would do no harm to the co whatsoever...so please post if you can.)

[Faranight]

So youre source is high Z and when your vout is not in regulation

I'm afraid you misunderstand.

The issue is happening even when there is no load connected to Vout of the boost converter. The current surge is caused by the inner IC circuitry even when the switcher circuit is disabled because the voltage on UVLO is too low (tied to GND). The issue only appears on the initial powerup i.e. when the voltage on the input rail is 0V and starts to rise like when exposing the solar panel to light for the first time. If voltage on the input rail can get past that looping stage (sufficient current is supplied) then the regulator powers on, and I get a stable 5V at the output.

Solar panel is Voc = 5V, Isc = 100 mA at full illumination. I'm using a 1000uF alu/elec cap and a 10uF MLCC in parallel and no load on the output.
Why would I use two boost converters? That would cause double the input surge currents.
Schematics is attached.

[timenutgoblin]

Solar panel is Voc = 5V, Isc = 100 mA at full illumination. I'm using a 1000uF alu/elec cap and a 10uF MLCC in parallel and no load on the output.

If you're using a 1000uF electrolytic decoupling capacitor (C1) at the input of your circuit, then it is likely to behave as a temporary short circuit as seen by your solar panel. Under short circuit conditions, your solar panel will output close to 0V at Isc (100mA). C1 will then gradually charge up for your circuit (U1). As C1 charges up, U1 is supplied with minimal voltage to start up, but the current drawn from C1 causes the voltage to collapse and U1 shuts down allowing C1 to charge up again and the cycle repeats.

My suggestion is that you could try installing a switch between C1 and C2 so that when you initially connect the solar panel the switch should be open and then you need to close the switch once C1 reaches maximum voltage Voc (5V). C1 will then function as a charge (energy) buffer powering the circuit (U1) which should hopefully stop it from oscillating (hiccuping). The output voltage of your solar panel will drop under load, but hopefully not too much that the voltage drops below the UVLO limit of U1.

[Faringdon]

Yes...ah i see, you need a PFET between C1 and C2...when the 1000uf gets up to 5v.....make a comparator detect this and switch on the pfet......add circuitry so the pfet stays on...ie a latch.
You coudl always do it with a micro and its ADC to control the pfet..then you woudl have flexibility.