Rebonjour Cher Farrington
for exactly the reasons mentioned, it is considered poor engineering to place any CT on the collector, FET drain, hot side, with 100s V fast voltage pulses,
CT interwindingS capacity is unspecified and difficult to design a shield with safety compliant creep, strike, insulation
Thus every PFC, SMPS, electronic ballast I ever have seen places the CT at or near ground or bus return rather than at a hot and fast leg of a converter.
One idea ...use a thin coax like RG/174U for the CT primary one turn, coax center conductor is CT primary at hot lead, ground ONE end of coax shield, leave other side of coax shield open cktmto,avoid shorted turn.
This technique could be used on the EE core design in your photos as well
Bon courage
Jon
PS...
My consulting fee...any Tektronix scopes 7000, plug-ins or 2465B, 2467B or parts,/spares....