100MHz to 400MHz

[Lovro7]

Hello everyone!

I’m working on a VFO for an HF radio transceiver. I plan to use the AD9951 DDS. For the best phase noise performance, it needs a 400 MHz clock input (with the internal clock multiplier disabled).

Since I also need an Si5351, I chose a 100 MHz TCXO (or OCXO, depending on the budget). My plan is to divide it by 4 using a D flip-flop to obtain the required 25 MHz clock for the Si5351, and multiply it by 4 to generate the 400 MHz clock for the AD9951. The oscillator output is a square wave.

How should I multiply the frequency to achieve the lowest possible phase noise while maintaining accurate frequency?

I considered filtering the signal and feeding it into a class C amplifier, then filtering out the 4th harmonic.

Another idea was to use two frequency doublers with a center-tapped coil, two diodes, and filters. However, each approach has its own drawbacks.

Do you have any suggestions for generating a clean 400 MHz clock? I’m also looking for a relatively low-cost solution because, as a high school student, my budget is quite limited.

Thanks for your help!

[fant]

Good mornig;

it is better two filtered doublers; a C class amplifier is full of odd harmonics, but very low in even harmonics.
This is my experience.

Mandi

[shabaz]

There's a possible misconception that you'll find a low-cost solution with an external multiplication stage, combined with delivering that output cleanly into the chip, that will produce lower phase noise than simply using the AD's internal PLL.

Alternatively, if you don't want to rely on the AD'99xx PLL, you could use an off-the-shelf 400 MHz crystal oscillator - though that oscillator will likely contain an internal PLL anyway, as many 100 MHz crystal oscillators do too.

If your goal is to build a complete receiver, I think this particular 100 MHz vs 400 MHz issue is not the most important use of your time. There are off-the-shelf AD99xx boards available. Mostly their layouts stink and they've been heavily cost-optimised, but those boards are still perfectly adequate for getting a system up and running and will save you a massive amount of time, effort and money, since it's quite an expensive circuit to do properly let alone first time. The off-the-shelf approach will quickly indicate whether improving this particular building block is actually immediately worthwhile, or whether another part of the receiver would benefit from improvement first.

Receivers (as with many other systems, it doesn't just have to concern radio) can become awkward beasts, and any sub-module can become the achilles heel, not necessarily just the freq synth.

Technically to simplify further, you could just use the Si5351 rather than a DDS, and still find the limiting factor to be some other part of the system. There is lots of enjoyable fun to be had with a design without getting bogged down on just one part of it. Anyway, it's just a subjective opinion.

[dobsonr741]

What is the impact of the 17dB difference in phase noise, when the 4x internal multiplier is enabled vs not? Is it worth the difficulty, and would it be actually any better? Can you measure it, or find out any of its artifacts during operating in the HF band?

[David Hess]

I considered filtering the signal and feeding it into a class C amplifier, then filtering out the 4th harmonic.

Another idea was to use two frequency doublers with a center-tapped coil, two diodes, and filters. However, each approach has its own drawbacks.

Using two doublers in series will be much easier to get working.  Each one needs to be tuned individually of course.  Do you have an RF voltmeter?

Do the active transistor versions have more phase noise?

[nonlinearschool]

How about a schematic for the idea?

I bought the same Arduino IC years ago with the intent of getting 100MHz. The seller included the code to do so. I long ago lost it, and ultimately bought a desktop100MHz and 200Mhz oscilloscopes. I now have no idea what to use that chip for, or experiment with.

For me. maybe the schematic would give me ideas of how I could put that chip I bought to use.

[iMo]

It was usually done by multiplying the XXMHz xtal oscillator in several single transistor stages (with a tuned LC in the collectors for example) where each stage was tuned to an odd harmonics, like 3rd or 5th.
For extreme purposes the stages were more complex.
PS: with any such multiplier you would need a good narrow band pass filter after it - at those 400MHz (like with BW=5-10MHz) - in order to get rid of all unwanted products, and after that band pass filter you would need an amplifier creating voltage levels suitable for the 9951.

For example:

44MHz xtal -> 1st stage 3rd=132MHz -> 2nd stage 3rd=396MHz.

25MHz xtal -> 1st stage 5th=125MHz -> 2nd stage 3rd=375MHz.

BTW. why do you need 400MHz clocked 9951 in your VFO for HF bands? What is your first IF?

[iMo]

Like this below (example only).
Mind it is a 100-400MHz design (construction).
See the output spectra - so after that you would need a 400MHz bandpass (narrow one, like SAW filter for example) and then a good amplifier such you will get the input level for the 9951.

[Lovro7]

There's a possible misconception that you'll find a low-cost solution with an external multiplication stage, combined with delivering that output cleanly into the chip, that will produce lower phase noise than simply using the AD's internal PLL.

You are right. I’ll probably include both the frequency multiplier and a bypass on the PCB so I can test which one works best for my application.

Alternatively, if you don't want to rely on the AD'99xx PLL, you could use an off-the-shelf 400 MHz crystal oscillator - though that oscillator will likely contain an internal PLL anyway, as many 100 MHz crystal oscillators do too.

I thought about that, but I couldn’t find any 400 MHz oscillators on DigiKey or Mouser with a frequency stability better than ±20 ppm.

If your goal is to build a complete receiver, I think this particular 100 MHz vs 400 MHz issue is not the most important use of your time. There are off-the-shelf AD99xx boards available. Mostly their layouts stink and they've been heavily cost-optimised, but those boards are still perfectly adequate for getting a system up and running and will save you a massive amount of time, effort and money, since it's quite an expensive circuit to do properly let alone first time. The off-the-shelf approach will quickly indicate whether improving this particular building block is actually immediately worthwhile, or whether another part of the receiver would benefit from improvement first.

The cheapest off-the-shelf board I could find was around €120. There was a much cheaper one, but it only goes up to 50 MHz, while I need just under 75 MHz.
Analog Devices was kind enough to send a couple of sample chips to my school, so I can experiment with them and see if I can make the design work.
There is a lot of documentation, reference designs, and community support available, so I think I should be able to get it working by the second or third revision. Before ordering the final PCB, I’ll first make a prototype PCB at home to verify that most of the circuits work. Then I’ll either redesign it if necessary or order the final board from JLCPCB and solder on the expensive components.

Receivers (as with many other systems, it doesn't just have to concern radio) can become awkward beasts, and any sub-module can become the achilles heel, not necessarily just the freq synth.

One of these modules is the old VFO based on the Si5351. Because of its poor output characteristics, it caused some problems in the second mixer and later stages of the RX chain. Another module is the AGC, but I will focus on that after I finish the VFO.

Technically to simplify further, you could just use the Si5351 rather than a DDS

Like I already mentioned, the Si5351 caused some problems. Filtering its output into a sine wave would probably solve them, but I would need to switch between several filters while operating, which is not very practical.
For the BFO and the second LO, I would still use the Si5351 because the frequency is more or less constant.

[iMo]

FYI - the best crystals are 5-10MHz one with special cut, the crystals (and crystal oscillators) >25MHz are all 3rd overtone.
There are low jitter/phase noise 400MHz oscillators, like the Silabs Si57x one, or Microchip, etc.

 https://www.microchip.com/en-us/product/101765-400-b-n-s-saw-oscillators..

https://www.skyworksinc.com/-/media/skyworks/sl/documents/public/data-sheets/si570-71.pdf

[Lovro7]

It was usually done by multiplying the XXMHz xtal oscillator in several single transistor stages (with a tuned LC in the collectors for example) where each stage was tuned to an odd harmonics, like 3rd or 5th.
For extreme purposes the stages were more complex.
PS: with any such multiplier you would need a good narrow band pass filter after it - at those 400MHz (like with BW=5-10MHz) - in order to get rid of all unwanted products, and after that band pass filter you would need an amplifier creating voltage levels suitable for the 9951.

For example:

44MHz xtal -> 1st stage 3rd=132MHz -> 2nd stage 3rd=396MHz.

25MHz xtal -> 1st stage 5th=125MHz -> 2nd stage 3rd=375MHz.

BTW. why do you need 400MHz clocked 9951 in your VFO for HF bands? What is your first IF?

The first IF will be 78 MHz, and the second IF will be 12 MHz.

I found a schematic for a ×2 frequency multiplier at a similar frequency from S53MV. It was used in a 2 Mbps radio station, so it should be suitable for this application. (6th page)

Filtering and amplification are not really a concern. For the best performance, the input needs a +3 dBm signal at 1.5 kΩ. I think that corresponds to almost 5 Vpp.

[iMo]

So no need for 400Mhz, the 9951 gives you a good signal at clock/3 already I think (see the DS there are some graphs).
Like 250-300MHz 9951 clock might be ok for the first mixer with such first IF.
Or, ask ADI for the newer samples - like those 14bit DDSes, with 48bit freq word, like 9912 etc. Those have cleaner output afaik.

Btw, those "ultra low jitter/phase_noise" VCOs are usually needed for radios operating at, say, from 70cm bands upwards, like EME, satellites, and really high XXXXMHz bands (where the signals are < -150dBm or so). Or for some special digi modes hams do not use on HF.
On HF you usually need an attenuator in front of the first mixer to calm down the huge noise coming in from the band, such your first mixer get not fully overloaded..


PS: btw. what do you plan as your first mixer?

[Lovro7]

Then I wouldn’t complicate it. I would make a direct connection to the oscillator and use the internal multiplier. Maybe I would experiment with frequency multiplication a bit, but if it doesn’t work, it doesn’t.

For the first mixer, I would use a homebrew diode ring mixer. For the second mixer, I’m testing different active mixer designs and I’m also considering a diode ring mixer. I’ll see what works best.

The first mixer needs to have excellent strong-signal handling because there is no AGC before it. There would be variable attenuator before first mixer. I would program control unit to automatically turn it on if input signal is too strong. The AGC is in the first and second IF stages, so the second mixer will see more or less the same input power (±15 dB).

[Uunoctium]

tl;dr

Q. Can I use a frequency doubler as a quadrupler?

A. Yes, by making use of the fourth harmonic rather than second at the output. There are two
disadvantages to consider, however. First, the fourth harmonic output level is 12 dB lower than the
second. Also, the harmonics closest to the fourth (the third and fifth) must be reduced, this could
complicate filter requirements.

taken from Mini Circuits app-note
https://www.minicircuits.com/app/DOUB9-2.pdf

[iMo]

..
..For the first mixer, I would use a homebrew diode ring mixer. For the second mixer, I’m testing different active mixer designs and I’m also considering a diode ring mixer. I’ll see what works best.

Diode ring mixer - good choice for HF. There are some good one with fets in a ring too. The Tayloe ones work good as well but it uses two phase clock (ie. FT-DX10 is using the FST3257 as the first mixer).
I would avoid the NE602, of course ..

[mawyatt]

This might be worth a visit for the OP.

https://www.eevblog.com/forum/rf-microwave/polyphase-or-n-path-mixer/

Best

[David Hess]

..
..For the first mixer, I would use a homebrew diode ring mixer. For the second mixer, I’m testing different active mixer designs and I’m also considering a diode ring mixer. I’ll see what works best.

Diode ring mixer - good choice for HF. There are some good one with fets in a ring too. The Tayloe ones work good as well but it uses two phase clock (ie. FT-DX10 is using the FST3257 as the first mixer).

Diode ring mixers have great performance but require high drive to achieve it.  Their high IP1 and IP3 are useful where there may be strong adjacent signals and their conversion loss is not a disadvantage where noise levels are already high.

I have always wondered how bipolar transistor base-emitter junctions would perform as diodes for a diode ring mixer.  They are very fast and have higher conductance than commonly available diodes.

[iMo]

A short reading on mixers..
 

[Gerhard_dk4xp]

This is how I did it in my 432 <--> 32 MHz transverter.
there is a connection between p500 and p501.
dni = do not insert

Signalsource is an ECOC5022 100 MHz oven ($120) or cvhd-950. (digikey)

The spectrum is taken from the point buf100.

B3742 are 400MHz SAW filters by Siemens/EPCOS/TDK/Qualcomm.
10 dBm max, IIRC.

<  https://www.digikey.de/de/products/detail/qualcomm-rf-front-end-rffe-filters/B39401B3742H110/1858962?s=N4IgTCBcDaIEIGYDsAWCBdAvkA  >

[mawyatt]

Anyone seriously interested in "Mixers" should spend considerable time studying the PolyPhase Mixer or N-Path Mixer in the link we posted above. This mixer discovery dates back over a couple decades and is quite unique, even violating convention mixer theory on noise performance!!

It achieves direct quadrature down conversion, below theoretical Bi-phase mixer noise performance, excellent rejection (narrow bandpass imposed directly on input port), superior harmonic rejection, bilateral impedance translation tunes with LO (impedance matching at input port with baseband R and C, no inductors) and so on. So complex and profound in behavior, yet so simple in implementation

This is why Apple acquire passiff way back, a small group in California that Dr Caroline Andrews (coauthor of foundational IEEE papers that started a whirlwind throughout academia) was a principle with.

Anyway, must read for those interested in a breakthrough mixer technology.

Best

[iMo]

Anyone seriously interested in "Mixers" should spend considerable time studying the PolyPhase Mixer or N-Path Mixer ..

Is there any practical example of those polyphase mixers for HF bands (1-30MHz)?
Those papers indicate the simulated 4-8 (or perhaps N) phase filters are to be implemented on a 65nm CMOS chip where the supporting ecosystem (switches, clocks, etc) could be scaled almost "as you wish". Also the simulation targets VHF/UHF freqs which are pretty different to HF.
For HF bands and discrete implementation such rather complex system might be considered impractical, imho. Already the 2 phase one - widely used today at HF - coped with the problems around the clocks at the very beginning (ie. how to generate 2 clocks with 90deg phase shift easily).

[mawyatt]

Anyone seriously interested in "Mixers" should spend considerable time studying the PolyPhase Mixer or N-Path Mixer ..

Is there any practical example of those polyphase mixers for HF bands (1-30MHz)?
Those papers indicate the simulated 4-8 (or perhaps N) phase filters are to be implemented on a 65nm CMOS chip where the supporting ecosystem (switches, clocks, etc) could be scaled almost "as you wish". Also the simulation targets VHF/UHF freqs which are pretty different to HF.
For HF bands and discrete implementation such rather complex system might be considered impractical, imho. Already the 2 phase one - widely used today at HF - coped with the problems around the clocks at the very beginning (ie. how to generate 2 clocks with 90deg phase shift easily).

With some fast discrete CMOS logic and 8 NMOS devices you should be able to implement an 8-Phase PPM without too much complexity or cost. We aren't into Amateur Radio, and retired (semi) now, so not up to date on what's going on with the PPM. However you should be able to find multiple uses of this in HF arena, but we haven't looked lately. Last we looked into this a decade ago, some SDRs were utilizing a version of the PPM.

Best

[MT4S301]

With some fast discrete CMOS logic and 8 NMOS devices you should be able to implement an 8-Phase PPM without too much complexity or cost

I don't think it's a great idea to build 8-phase circuit on a PCB where precise phase shift is critical. I believe HAMs stop at the 4-phase Tayloe mixer for a reason.

excellent rejection (narrow bandpass imposed directly on input port), superior harmonic rejection, bilateral impedance translation tunes with LO (impedance matching at input port with baseband R and C, no inductors)

Then how to deal with DC offset and spurs that come along with the zero-IF architecture? Low-IF avoids those problems but whatever preceding the mixer now have to drive large cap loads

[mawyatt]

With some fast discrete CMOS logic and 8 NMOS devices you should be able to implement an 8-Phase PPM without too much complexity or cost

I don't think it's a great idea to build 8-phase circuit on a PCB where precise phase shift is critical. I believe HAMs stop at the 4-phase Tayloe mixer for a reason.

excellent rejection (narrow bandpass imposed directly on input port), superior harmonic rejection, bilateral impedance translation tunes with LO (impedance matching at input port with baseband R and C, no inductors)

Then how to deal with DC offset and spurs that come along with the zero-IF architecture? Low-IF avoids those problems but whatever preceding the mixer now have to drive large cap loads

If you study the PPM in detail (caution requires an extensive effort to truly understand the details of this, see the various IEEE papers we mentioned for starters, the PPM is way more involved than the Tayloe Mixer/Detector) one finds that the phasing of the clocks isn't that critical. We know we've built these well into the GHz regions, albeit on an IC, but one shouldn't have much trouble with fast discrete CMOS logic (simple 8 bit shift register) creating the 8 phased clocks for lower frequency use.

There's a video of the commutating filter (N-Path Filter) where a professor (Nauda>sp) build this on a port board with discrete components, the PPM is similar and should also be possible with this approach (at lower frequencies). For higher frequencies a copper clad (or PCB) test board should suffice

Managing DC offsets and spurs was never a serious issue and Professor Molnar at Cornell had a zero control loop to correct the clock spur at the antenna port (look into the later IEEE papers it might be there). This was a particular parameter that was important (clock reradiating from the antenna port) in "certain" applications.

One application we had was an ultra low power FSK receiver where the two tones landed in the I and Q channels in a self clocking scheme. Suspect one could create a low-IF which resides in the I and Q channels, altho we've never done such, but believe that some of our former colleagues did this for an ultra sensitive satellite receiver. We've been "out of the research loop" for awhile, so suspect many other uses are "out there"

Best 

[EggertEnjoyer123]

I had the exact same problem I ended up using two of the doubler circuits shown below to achieve 100 MHz to 400 MHz. The baluns were a few turns of twisted magnet wire on an Aliexpress Ni-Zn ferrite core.

You can probably do it in one step but I used low-Q SMD inductors so it was easier to do it with two steps. The design was to drive a SRD which drove a sampler in a DRO based phase locked loop. The IF was used to phase lock the DRO. It ended up working successfully though the phase noise was a bit high. It is likely because using another RF oscillator to downconvert results in the IF having much higher phase noise than if you just used a divider.