NanoVNA Custom Software

[joeqsmith]

While it wouldn't take much to improve on my old HP,  I would like to find something that will support lower frequencies (<1MHz) and faster data rates to the PC.  I dare say without the Labview interface, the old HP would be worthless as I no longer have a grease pen to write on the screen.    With Windows 10, I now need to run it under a virtual XP box and I can't see investing the time to do this.   I want to get something new enough to at least support Ethernet.    Thinking something along the lines of the old Agilent PNAs like this one:

https://www.ebay.com/itm/Agilent-PNA-E8358A-300kHz-9GHz-2-Port-4-Receiver-RF-Vector-Network-Analyzer-015/223568031067?hash=item340db16d5b:g:rw4AAOSwK0ldFTxx

I've been reading the manuals and like the system but they do seem to have some high asking prices for them.   

[DH1AKF_Wolfgang]

Please look here:
https://groups.io/g/nanovna-users/wiki/shellcommands

[joeqsmith]

Please look here:
https://groups.io/g/nanovna-users/wiki/shellcommands

If there is something specific you would like me to have a look at, just upload it here or to Google docs.   

I have to be registered to gain access to this area.  I was a member for a very short time.  The majority of posts were about how to print a case for it.    There were very few technical discussions and so I left. 

That ebay listing advertises "Fully Functional,  aligned with test data", but we can clearly see one of the source attenuators is damaged.   


https://www.ebay.com/itm/Agilent-PNA-E8358A-300kHz-9GHz-2-Port-4-Reciever-RF-Vector-Network-Analyzer/273440234503?_trkparms=aid%3D1110001%26algo%3DSPLICE.SIM%26ao%3D2%26asc%3D20160323102634%26meid%3Df1cbcf5bc5c74606920468d8c5276bd9%26pid%3D100623%26rk%3D2%26rkt%3D6%26sd%3D223568031067%26itm%3D273440234503%26pmt%3D0%26noa%3D1%26pg%3D2047675&_trksid=p2047675.c100623.m-1

I was thinking, pay a little more and you could get a working one.     We can see "Seller refurbished: An item that has been restored to working order by the eBay seller or a third party not approved by the manufacturer. This means the item has been inspected, cleaned, and repaired to full working order and is in excellent condition."   Again, slide down to the diagnostics page and we can see the unit fails the diagnostics. 

Most listings don't offer any details so it's a pretty high risk for such an old system that is no longer serviced and parts may be difficult to locate. 

I haven't looked at what they are actually selling for yet but  for a 20 years old, damaged unit,  the prices see way off.    Maybe time for some very low offers.   

[Roger Need]

I have to be registered to gain access to this area.  I was a member for a very short time.  The majority of posts were about how to print a case for it.    There were very few technical discussions and so I left. 

Joe,

The groups.io nanaovna users group has changed a lot since you first saw it. High SNR now... 

There a now a lot of people with extensive VNA experience posting good technical stuff at a high level.  Some are VNA calibration commercial vendors and one is developing a new low cost VNA's that go up to 3.5 GHz for $100 USD (just went into production) . Hugen who made the nanovna so popular by creating an assembled product posts from time to time as well as several authors who have created forked firmware and software for the device.  There is also an extensive wiki on all facets of software, hardware and documentation plus many informative user manuals. 

Roger

[joeqsmith]

I have to be registered to gain access to this area.  I was a member for a very short time.  The majority of posts were about how to print a case for it.    There were very few technical discussions and so I left. 

Joe,

The groups.io nanaovna users group has changed a lot since you first saw it. High SNR now... 

There a now a lot of people with extensive VNA experience posting good technical stuff at a high level.  Some are VNA calibration commercial vendors and one is developing a new low cost VNA's that go up to 3.5 GHz for $100 USD (just went into production) . Hugen who made the nanovna so popular by creating an assembled product posts from time to time as well as several authors who have created forked firmware and software for the device.  There is also an extensive wiki on all facets of software, hardware and documentation plus many informative user manuals. 

Roger

Good to hear that the group has evolved.   

In my first post, I had mentioned the plan was to compare the 3GHz unit with a few others once it becomes available.   As I mention, their Wiki appears locked for member's only.   So if there is anything specific people would want me to look at, they would need to make it publicly available.   

https://www.eevblog.com/forum/rf-microwave/nanovna-custom-software/msg2887094/#msg2887094

There was a member here that was doing a fair amount of work on the firmware.  I haven't looked at their progress in a few months but the later versions I was testing were a lot more stable that anything else I had seen at the time.

[RCinFLA]

You are basing this on ADC bits.  ADC bits is not the limiting factor on dynamic range.  It is the synthesizer, followed by harmonic mixing that is limiting dynamic range.

Also the lower maximum sampling rate of the TLV320 limits the frequency of the I.F. which in turn results in more sideband noise from the synthesizer which limits dynamic range.

[joeqsmith]

You are basing this on ADC bits.  ADC bits is not the limiting factor on dynamic range.  It is the synthesizer, followed by harmonic mixing that is limiting dynamic range.

Also the lower maximum sampling rate of the TLV320 limits the frequency of the I.F. which in turn results in more sideband noise from the synthesizer which limits dynamic range.

I would have no way of knowing what this is in regards to.   Who is "you" and what was based on ADC bits? 

[OwO]

Yes, so V2 uses the built in ADC on the GD32. The input noise floor is still far above the ADC's own noise floor so it was "free" cost savings. The bottleneck on S21 noise floor is the PSRR of the receive mixer and the fact that LF noise can't easily be filtered (and there is no power budget available for a linear regulator instead of a switching one).

The bottleneck on S11 trace noise is synthesizer phase noise, both the close-in noise (slow wobbling of the center frequency/phase) and the noise at the image frequency (f_RF + f_IF * 2). The close-in noise can be cancelled by the reference receiver, but the image noise can't. At 12kHz IF the two noise contributions are about the same, which means the noise improvement due to the reference receiver is only 3dB, which is why we went with a switched reference channel in V2.

[profdc9]

May I make a suggestion?  Synchronize the data acquisition to the IF cycles, rather than free acquiring the IF because the microcontroller and the frequency synthesizer are on different clocks.  This also helps with phase noise.  The VNA I designed acquired four samples per cycle, so that one can do simple addition and subtract to get in-phase and quadrature components.  This is not presently done in the NanoVNA.  This will help reduce the sensitivity to phase noise and allow much longer integrations (smaller IF bandwidth) to achieve a lower noise floor if needed.

Also, I don't think the NanoVNA as built presently stays within the linear region of the mixer.  It overdrives the inputs of the SA612 severely.  The datasheet indicates the proper level of drive.  The RF pins should be much less than kT/q or 26 mV, usually 10 mV is the maximum desired drive.  The oscillator pins should be no more than 200 mV.  I stick with 100 mV to stay in the linear region.

Gilbert cells are good for RF receivers but their dynamic range is not that great because they only accept small signals.  The dynamic range in practice is determined by the noise voltage on the low-end (a few microvolts) up to the limit where the intermod products start to distort the mixing signal (about 10 mV).  EU1KY did a good job in his design because he maximized the signal available to the SA612 given these constraints.   The tests being done on the NanoVNA on open, short, load don't test this at all.  Try measuring 10000 ohms S11 in the HF or 1000 ohms at UHF and see what happens.  Don't make these mistakes again with a new design.

Also, it wouldn't hurt to have a proper fixture so that you can do these tests properly.  I designed one for my VNA.  Perhaps you could use that or make one of your own.  I very much tried to wring every bit of accuracy out of the VNA design even if it meant the data acquisition would be slow.

Anyways if any of this interests you, take a look at

http://github.com/profdc9/VNA

[ogden]

microcontroller and the frequency synthesizer are on different clocks

No they are not. In NanoVNA and NanoVNA.v2 everything related to signal path (mixers & ADC) is clocked from single source, si5351.

[joeqsmith]

https://www.rtl-sdr.com/a-nanovna-2-0-is-in-the-works-same-price-frequency-range-up-to-3-5-ghz-higher-dynamic-range/

In the above article, dated Oct 4th 2019, they mention initial sales in roughly 3 months.  I assume then that things are pretty much wrapped up with research/development and it is now in the production phase .   Is this correct, or is the project still in the design phase?

[profdc9]

That doesn't mean that the acquisitions are synchronized so that the same part of each IF cycle is sampled.   How many clocks of the crystal on the SI5351A correspond to the RF and LO signals and the MCLK driving the codec and the microcontroller?  They are all on separate fractional dividers.  Being clocked from the same crystal is a necessary, but not sufficient, condition for the IF acquisition to be synchronized.  It doesn't take much error in the phase to limit your dynamic range, and the microcontroller needs to know the phase fairly precisely to demodulate the IF signal, especially if there no other signal indicating the relative phase relationship between the microcontroller's clock and the IF.

Anyways, do it or don't do it, it doesn't matter to me.  The NanoVNA is a result of groupthink.  There's not much verification of performance against real loads.  All of the emphasis is on precision, not accuracy.

https://groups.io/g/nanovna-users/topic/nanovna_real_resistance/33508471

You might want to understand the sources of error in the present NanoVNA before moving on to the next one.  The SI5351A is used out of spec up to 300 MHz and the SA612 is heavily overdriven.  What do you expect?  But since it seems its mostly used for testing whether antennas are matched or not, it's probably good enough for most of its users who have never used a VNA before and don't know what to expect.  I can't even get a straight answer to how to calibration works on the NanoVNA.  Is there anyone besides edy555 that knows how that works?  I sat down and derived the equations myself and tried to figure out how the NanoVNA firmware implements calibration.

Anyways no matter how it turns out that NanoVNA v2 will be a success, so there's no point in criticizing it.

[OwO]

Yes I know what you are talking about. People on that list "verify" their calibration by remeasuring their short, open, and load. I suggested the coaxial stub test to check for linearity and so far only one person has done a proper test.
V2 is a separate effort and doesn't reuse anything from the original design. The IF signal's period is exactly 25 ADC clock cycles. The mixer is a high linearity one (over 20dBm IIP3) and is driven at least 20dB below P1dB. I posted some linearity and error magnitude calculations on the list where I concluded you must stay 20dB below IP3 and 10dB below P1dB to get reasonable EVM.

[profdc9]

Well it's good, if you're going to make a fresh start, it's better of course to not repeat mistakes.  I think some kind of fixture would be helpful, however, to go with the new VNA to verify its operation.  That way someone who receives it can verify it is working properly to spec.

I have used a zif socket, and if used carefully, can actually work up to about 500 MHz!  But that's not going to cut it for the V2, so think about a good set of standards and a fixture to go with it.  That will both help to create it and put to rest questions about its performance.  Even a simple PCB with a coplanar waveguide on it, something like this:

https://www.edn.com/pcb-fixtures-improve-component-measurements/

could be a big help.

[ogden]

That doesn't mean that the acquisitions are synchronized so that the same part of each IF cycle is sampled.   How many clocks of the crystal on the SI5351A correspond to the RF and LO signals and the MCLK driving the codec and the microcontroller?  They are all on separate fractional dividers.

Many commercial VNA's have multiple Fractional-N synthesizers as well. For example N5222 have three independent synths (RF LO, source1, source2). Only difference to NanoVNA - ADC clock of "commercial VNA" usually is not PLL-synthesized. BTW MCU&ADC of NanoVNA also can be clocked from "jitter-less clock", directly from XTAL (thru mode of SI5351A). Just knowing that any PLL have phase errors is not enough. Did you actually analyze impact of SI5351A phase noise on measurements?

[profdc9]

If you put the IF on a scope, you can clearly see the jitter.  I don't have a spectrum analyzer to measure the phase noise in dBc/Hz but a zero-crossing detector clearly shows the edge of the pulse moving around.  If you have two high frequencies with very close fractional divider settings, as you would have when the difference between the RF and LO is a IF frequency a thousand times smaller or more, their mixing product will not repeat until the counters for both fractional dividers both run through their counts and realign.  A fractional divider guarantees that a fixed number of pulses of approximately the same length are produced per time interval, but some are pulses stretched a VCO cycle and others are not depending on the state of the fractional divider counter.  This means it might take many milliseconds with a 20-bit fractional divider for the output clock signal to repeat.  There will be beats between the two signals that will reoccur over the millisecond repeat intervals of the fractional divider counter of the two signals, which means the edge of the mixing product of the two clocks can move around on a time scale over milliseconds.  Depending on the state of the fractional divider counters when you start and end sampling, the phase of the signal may or not may not be what the microcontroller expects the signal to be and uses to demodulate the signal.   Some way for the microcontroller to know the phase of the IF signal, such as a zero-crossing detector or other trigger signal, could be helpful in ensuring repeatable measurements.  A fast XOR gate would be ideal for this purpose, or a zero-crossing comparator triggering off of the reference.

[ogden]

No need to seek for instruments or build them because you already got one - VNA itself. Just run thru calibration at single frequency for some time to gather "statistically enough" phase/magnitude readings. Phase spread bell curve (if any) will indicate phase measurement accuracy.

[DH1AKF_Wolfgang]

Please imagine, how this VNA works:
There are three mixers, all driven with the same frequencies f1 and f2.
IF = f2-f1 is constant.
All phase jitters in the IF are the same.
In addition, low-pass filters and  especially the FFT include calculations and give further average values. Your considerations of phase jitter do not lead to a meaningful result.

And keep in mind: This is a product for ham radio enthusiasts, not intended for professional use.
For antenna matching/measurement it is fully sufficient, also for tuning a filter or amplifier.

[ogden]

Please imagine, how this VNA works:
There are three mixers, all driven with the same frequencies f1 and f2.
IF = f2-f1 is constant.
All phase jitters in the IF are the same.

Incorrect. f1 and f2 are coming each from separate Fractional-N synthesizer (PLL-A & PLL-B), their jitter definitely are not the same.

[joeqsmith]

a product for ham radio enthusiasts, not intended for professional use.
For antenna matching/measurement it is fully sufficient, also for tuning a filter or amplifier.

My friend who gave me one wouldn't have any idea what amateur radio is, and I have no interest in it.   That certainly doesn't mean that we have no use for the Nano.  I would imagine any hobbyist experimenting with high speed designs that has never used a VNA could benefit from it.  As a minimum, it may help cement some  concepts.   IMO, it's a great product for anyone wanting to learn the basics.   

[DH1AKF_Wolfgang]

>> Incorrect. f1 and f2 are coming each from separate Fractional-N synthesizer (PLL-A & PLL-B), their jitter definitely are not the same.<<

Hello, Ogden, you misunderstood me.
My statement refers to the difference f1 - f2.
And to the averaging of the FFT.

[ogden]

>> Incorrect. f1 and f2 are coming each from separate Fractional-N synthesizer (PLL-A & PLL-B), their jitter definitely are not the same.<<

Hello, Ogden, you misunderstood me.
My statement refers to the difference f1 - f2.
And to the averaging of the FFT.

Please explain what you mean by saying "All phase jitters in the IF are the same", how there can be more than one jitter in the f1 - f2 difference. Are you sure you fully understand PLL synths?

[profdc9]

Ok, it looks like I opened up the can of worms in Pandora's box, or whatever mixed metaphor you like.

I am going to try to put an example forward.  Say the PLL VCO is 600 MHz, and we want the RF signal to be 10.25 MHz and the LO to be 10.26 MHz.  The integer divider for both the RF and LO signal is 58.  The fractional part for RF=10.25 MHz is 0.53658 and for the LO=10.26 MHz it is 0.47953.   The divided by 58 frequency is 10.34482 MHz and the divided by 59 frequency is 10.16949 MHz.  So we expect the RF signal to actually be at a frequency of 10.34482 MHz for 0.46342 of the time and 10.16949 for 0.53658 of the time.  Likewise, the LO frequency is at 10.34482 MHz for 0.52047 of the time and 10.16949 MHz for 0.47953 of the time.  While some of the pulses have a period of 96.7 ns, and others 98.3 ns, they must be interleaved so that the instantaneous IF beat frequency between RF and LO does not deviate too much.  I am not sure how the SI5351A actually interleaves the two sets of divided pulses, perhaps it uses a sigma-delta modulator?  Nevertheless, one can clearly see the period of the IF vary on the scope.  For a 3.333 kHz IF frequency (3rd harmonic) I see about 2-4 microseconds of jitter.  For a 300 microsecond period, that corresponds to 3 microseconds = 3.6 degrees or 0.0628 radians, which suggests an instantaneous frequency variation between 3.300 and 3.367 kHz, but it averages to 3.333 kHz.  Because the SNR of a single measurement is approximately 1/(radians) that would be a SNR of about 16 or 12 dB.  But if we integrate over many cycles, we can improve this by assuming the phase errors are independent.  Of course they aren't, and if you integrate assuming the correct third harmonic mean frequency (10 kHz) when you demodulate the phase errors ought to cancel out and the signal improvement should be better than assuming independent phase errors.  But if the instantaneous frequency of the IF is varying a little bit due to the fractional divider, say 1% or so, that does contribute some phase error to the demodulated signal.

I tried to deal with this problem by actually clocking the ADC using a zero-crossing detector.  However, there are probably better ways, or maybe the integration time is long enough in practice that this error source is negligible.  But it is not true that the period of the IF is constant but it does average out over a long interval.

[Bud]

I posted some linearity and error magnitude calculations on the list where I concluded you must stay 20dB below IP3 and 10dB below P1dB to get reasonable EVM.

So much trouble to investigate something that has been known for ages, seriously ...?   

[OwO]

Apparently not by the original developers of the Nano which drives the mixers close to P1dB.