I can't see the screw holes in the photo; are they just loose, open? Or do you have screws grounding them to your plate? 'Cuz the plane will be complete with those joined, and otherwise you have the huge hooked return path from the bypass cap, and it's probably even worse than before.
The peak does seem to be worse, which is interesting. Although I'm not sure what/why you're concerned about the valley at 18MHz? Surely you mean the peak at ~40MHz (~-13dB)? Parallel resonance of a LISN choke is good, it's definitionally as high an impedance as it will ever achieve, and therefore the most isolation between RF and DC paths. The series resonances, and resonances between parts, are where you lose performance. But even with the -13dB peak, that's still within a couple dB thru-path (EUT to RF).
I'm definitely not knowledgeable on this (so please take with a pinch of salt anything I type on this topic!).
Apologies if it is not helping.
When I was trying to experiment with a LISN, I used the layout below. The coils are separated greatly, for little interaction. Everything was taped to the inside of a (sanded to be conductive) metal cookie tin, so it was shielded.
Unfortunately I don't have this setup any more to run any tests.
Yeah, that's fine. The EUT leads should probably be routed away from the RF connectors to keep CM coupling down, and/or the ground plane could be joined to the enclosure nearby (i.e. put a bit of foil between the connectors and solder it down).
The coils would probably be better elevated a radius or two above the plane: as shown, you're shunting some of the field, reducing inductance from the free-space value. But that's a small tweak. It's not like it needs to be crazy accurate: -10% here or there will hardly be noticed.
The USB shell should probably be grounded to the enclosure, or the cable jacket stripped where it enters the enclosure and a ground clip used to join it there. Same for the RF connections I suppose -- rather, use bulkhead connectors to pass thru.
Huh, that's also a USB-A providing power? That's rather cursed.
Well, you'd do it nowadays with a USB-C, where it doesn't matter, heh.
I want this in the end to be usable with mains supply/DUT. That means 2 or 4 parallel LISN. If i just use open wires as inductors, i would expect them to couple between each other (like a transformer), pick up all sorts of foreign noise (like an antenna) and transmit some of the DUT noise.
So i expect to need some sort of shielded inductor and/or a toroidal setup to keep the magnetic field loop short. Using standard inductors seemed the easier thing to do, but i may have to try again with different ones.
Look at where the inductors are connected: they are in shunt to the RF path. The main magnetizing signal on them (ignoring DC or mains), is the RF signal itself. Any signal coupled in or out, is simply in relation to that.
If you're testing EUT on an open bench for example, induced waves from the EUT acting as an antenna, receiving commercial broadcast channels for example, will easily dominate over anything a compact inductor can pick up.
In a shielded test chamber, LISN pickup is equally shielded, no problems there.
Even if the LISN ground isn't very well bonded, say, and there's significant fields say from EUT to LISN to reference plane (test chamber interior), and some of that field couples into the inductors -- that's still only the tiniest percentage shift in readings. If your EMC readings are fractional-dB precise, I have news for you, you're doing it wrong!
Likewise coupling between channels, what's it matter? They're already intimate with each other in the power cable! You might get some gain/phase error that makes a CM/DM network less useful (less accurate/representative), but not knowing what effect the cable has is already working against you, and, simply part of the mysteries you have to solve in the course of an EMC project. Whether that's enough of an error, an added mystery, to materially affect the project timeline, might be a good question, but I would be inclined to suspect it's small.
Anecdote: I built this thing some years ago (per-channel schematic:
https://www.seventransistorlabs.com/Images/LISN_20MHz_30A.png ),
With all the RF ports terminated, one EUT port driven, and looking at each RF port in turn, there is a peak evident on the neighboring channels, on the order of -30dB or -40dB. I assume this is due to stray capacitance resonating with the inductance, and thus acting as a matching network at one narrow, unlucky frequency; the coupling ratio is still small so the peak is low, but it is detectable in a lab setting. It's basically irrelevant in a practical setting, and I didn't notice any such peaks in use (being aware of them after testing).
Or wait, was it with RF ports open-circuit? I forget now.
I tried adding ferrite shield plates between inductors, with no effect.
Because i intend to use this on mains, the special thing i plan to do, is have separate "Protective Earth" and "Functional Earth". So i need a groud arrangement, that is separate for electrical safety rules, but connected for RF rules.
Earth is easy -- run all the EUT cables into the LISN as the applicable testing standard dictates, and, if that includes safety earth, just wire the DC side to chamber/earth, done and done.
Note that equipment earth is often hard-grounded in EMC tests, so, I do mean "applicable standards". Some may stipulate otherwise, so, make careful note of this either way, and set up accordingly.
I regularly keep a jumper wire on the above network, actually, so that one port can be shorted to ground, and I just let that also be reference plane / RF ground for convenience. Note the 7th screw terminal joins to plane, so everything can be wired up, and copper clad out to the edges means EMI tape joining it to EUT / chamber reference plane is convenient.
My problem with the inductor parasitic capacitance /SRF is much more basic. I wanted to work around the parasitic capacitance of one part by adding others in series. That seems not to work the way i expected it.
As mentioned, EPR of one resonates with EPL of the next, and so on; it is a basic problem, as you say, and is as basic a modeling problem. SPICE is excellent for such application -- find or fit models to the components used, and put them together, you should be able to recreate your measurements. But, again, be mindful of what ground really is -- if that DC port or bypass cap isn't actually referenced to ground, you need to model the inductive loop that takes it back there.
Compare with shabaz's example, which bypasses the DC ports early and often, direct to GND plane. You can't use ceramic chips at AC mains voltage, of course (well... sort of, but to say: maybe better not to), but a couple film caps, direct to the reference plane, and maybe some loss and additional filtering if you need more isolation to the DC port or freedom from impedance mismatch (which is what motivates my above circuit), will easily do as well.
It's just important to emphasize the role and nature of that reference plane, and how little trace or wire length it really takes to spoil the plane-ness of it.
Another example of mine:
2 x 6uH (actually more like 8uH at zero bias, but dropping to 5uH at ~100A), uhh although it's 8AWG wire so "100A" is a bit generous in continuous operation, but whatever, it's just a matter of temp rise and voltage drop. Notice the ground plane is contiguous underneath the chokes and signal path, with the RF path made towards the terminals (rear) and coax bringing the signals up to BNC connectors. The DC port is C || (R+C) bypassed, to be well-behaved over a modest frequency range without going crazy on attenuation. It's made with 600V capacitors so I could actually run mains on it if I wanted.
Again, all copper clad construction, so I can put EMI tape down to the reference plane no worries, and, EUT bolts onto the terminals with whatever cables are necessary.
Tim
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