Why more current for Rx than for Tx in a nRF24L01+?

[RoGeorge]

From the nRF24L01+ datasheet:

•Worldwide 2.4GHz ISM band operation
•250kbps, 1Mbps and 2Mbps on air data rates
•Ultra low power operation
•11.3mA TX at 0dBm output power
•13.5mA RX at 2Mbps air data rate
•900nA in power down
•26μA in standby-I
•On chip voltage regulator
•1.9 to 3.6V supply range
...

I'm trying to find which method will be more power efficient when collecting low throughput data with no real time requirements from battery powered sensors, e.g. from a weather station, a room HVAC monitor, etc.:
- periodic data pushing from the sensors to the central station or
- periodic interrogations of sensors from the central station, or
- maybe some other method?

Common sense will say the Tx mode requires more power than Rx, because in Tx mode extra power is needed to feed the final Tx amplifier.  However, in nRF24L01+, the Rx mode uses about 20% more current than the Tx mode.  And that is for 0 dBm Tx power, for lower Tx power the Rx current can be almost double than the Tx current (i.e. supply current @-18dBm Tx power is only 7mA, vs 13.5mA for Rx mode).

Why so, and is this common or it's just some nRF24 specific quirk?

[MarkF]

Watching...   

I'm using the nRF24L01+ for a model railroad throttle and wanting to extend battery life.
The throttle has the nRF24L01+, a small OLED display and a PIC18F2620.

The throttle transmits the speed at 10Hz with data interrogation when the Cab number is changed.
XMT power set a -6dBm.
The OLED has a 20 sec timeout dim mode and both the nRF and OLED power down at 60 sec.

It goes from 115mA down to 90mA at full battery save mode.  Still looking to get it lower.
I think the heaviest user is the OLED and would need external circuitry to totally remove its power.

[TheMG]

Probably due to the fact that there is a substantial amount of signal processing required during receive in order to decode the received baseband signal and apply things like error correction. In TX mode that part of the chip likely goes into some sort of standby state. Encoding a signal for transmission is a lot less compute intensive than receiving.

[ataradov]

This is pretty common for low power radios. I'm not sure what exactly contributes to that. I think a significant part of that is the correlator searching for the synchronization sequence. It happens at a higher frequency than the bit rate, so it consumes quite a bit of power. Once the receiver is synchronized, the actual data receive power is probably lower.

[David Hess]

I made the same observation about amateur handheld radios 20 years ago.  The ones which supported an output power of 20 milliwatts drew less power when transmitting than when receiving.  And these radios only did analog processing.

[TheUnnamedNewbie]

Simple modulation can use all the benefits of digital electronics to go low power in the transmitter. The PA can be highly non-linear (provided you do the correct amount of filterign) so it can be pushed well into switching - especially at lower frequencies like 2.4 GHz. All the data is digital, and stays that way right up to the modulator. Since it is a FSK modulator, this doesn't have to be some kind of complex mixer, Likely just a VCO with some tunable caps, this could even be a ring oscillator (and a big tunable cap for the PLL)

The receiver however still needs a lot of LNA gain stages. Need to use a lot of current there to have low noise. Might need high linearity to prevent blockers. Probably a low-IF or zero-IF architecture, which requires fast analog circuits. Then need some AGC maybe, and some post-processing in the digital domain to clean stuff up.