Bode Plots Useful?

[mawyatt]

Know this has be debated before, and bottom line it depends on one's use profile.

Turn's out that we were approached to help out with a very interesting advanced research project involving a new type of semiconductor-like material (batched processed) which can be "programmed" into a delay element for creating phased array beam steering by means of a programmable time delay for MW and MMW signals. Think of a Lithium Niobate (Voltage controlled optical index of refraction material) but at lower MMW frequencies. To control the time delay a high programmable voltage is required, and the voltage must be toggled between +- states to prevent charge build-up.

Since this technology is utilized as a electronically programmable beam steering phase array system, the high voltages are created with a precision 16 bit DAC and amplified to the high voltage, up to +- 150VPP (initally 300VPP). This is to serve an initial phased array test system of ~80 elements, and later larger array numbers with a full custom chip development.

A few HV amplifiers were evaluated for pulse and frequency response, the HVAD4702, PA443 and OPA462 with Bode plots shown below. This proved to be very easy with the SDS2XXX+ and SDG2042X, sure we could have done this with any scope and signal generator and created a table of phase and amplitude vs frequency then made a plot with a spreadsheet, but taken more time and effort.

Anyway, before getting our first DSO/MSO I didn't think the Bode plot built-in capability worth considering, now the built-in Bode plot capability has proven highly useful (not only in this application), this will become a "requirement" for any future DSO/MSO purchase.

Must add that Siglent's implementation of the Bode Plot is superb, and this from an old analog guy who's been working with these plots for over 50 years

Best and Happy Memorial Day,

[nctnico]

Having bode plot inside a DSO is quite handy indeed. A couple of weeks ago I wanted to try and see how a filter behaves. The bode plot function in the DSO I have here worked perfectly fine for that. A 'good' measurement using my network analyser didn't reveal much extra information (except for being able to test the filter up to a much higher frequency).

[mawyatt]

We used to have an instrument, think it was called a Signal Analyzer or some such, for lower frequency (<100KHz) measurements. Then the usual SA for above this range. However the SA was for the typical 50 ohm environment and we often used a Tek scope which had a vertical channel output as an "Input Amplifier" for the SA when higher impedance were required. This all worked and worked well, but was cumbersome and took time to setup. Now we just need a modern DSO/MSO to cover the low frequency range, nice

Best,

[nctnico]

Sounds more like not investing in the right tools. I have a network analyser from Anritsu which goes from 5Hz to 300MHz and it has switchable 50 Ohm / 1M Ohm inputs.

[Fungus]

Just feed it some white noise and do an FFT - same result!   

[tggzzz]

Just feed it some white noise and do an FFT - same result!   

Except for intermod products raising the noise floor, and needing a high total power to get above the noise floor at any given frequency

[mawyatt]

Sounds more like not investing in the right tools. I have a network analyser from Anritsu which goes from 5Hz to 300MHz and it has switchable 50 Ohm / 1M Ohm inputs.

This was from back in the 80s and 90s when I did get some time in the labs. Haven’t been able to get back to lab type work until I retired a couple years ago. BTW never liked Anritsu equipment, long story and good reasons.

Best

[mawyatt]

Just feed it some white noise and do an FFT - same result!   

Lot of work rather than just use built in Bode plot👍

Best,

[tautech]

Sounds more like not investing in the right tools. I have a network analyser from Anritsu which goes from 5Hz to 300MHz and it has switchable 50 Ohm / 1M Ohm inputs.

Which has the disadvantage of not being able to display multistage results from a DUT simultaneously like Bode plot on a multichannel DSO.
In Siglent DSO's with BP the input impedance can be widely specified.

This from 2018 with the first BP version in SDS1104X-E that has since been much improved:



Source posts:
https://www.eevblog.com/forum/testgear/siglent-sds1204x-e-released-for-domestic-markets-in-china/msg1436912/#msg1436912
https://www.eevblog.com/forum/testgear/siglent-sds1204x-e-released-for-domestic-markets-in-china/msg1435854/#msg1435854

[mawyatt]

Just feed it some white noise and do an FFT - same result!   

Except for intermod products raising the noise floor, and needing a high total power to get above the noise floor at any given frequency

This brings up a good point about using a broadband noise source for frequency response measurements. Having developed a means to do something similar back in 80, we developed a IFT instrument to produce a TD waveform that was void of energy in certain frequency bands (NPR measurements). After creating this waveform using an IFT from a FD graph, it was loaded onto a custom developed AWG (maybe one of the 1st) to produce the desired FD result with the frequency nulls. We found that broadband noise sources tend to have very large peak to rms values which limits the ability to use in many applications, whereas a standard Bode Plot using a sine wave with peak to rms value of 1.414 can be used at high levels without fear of saturating the DUT. Another issue with using a noise source as an input is the DUT "sees" the total input signal over the entire frequency range all the time, this may create all sorts of issues if subtle non-linearity comes into play and as you mention "raise the floor" but also introduce other undesirable effects, whereas a simple single tone sine source could circumvent some of these effects. One could employ correlation to further benefit the measurements in the presence of these effects, but don't know if this signal processing technique was employed with the Bode Plots. Maybe someone familiar with the Bode Plot coding could comment?

The latest Siglent implementation of the Bode Plot alters the output vertical input stage scale factor as the frequency changes to place the waveform comfortably within the scope's ADC dynamic range across the frequency range, clever use of the scope vertical input scaling and extends the effective DR for the Bode Plot. Siglent didn't stop there and even allows an input amplitude "profile" to be used to increase the Bode Plot DR, here the input signal source amplitude is altered in a predefined way as the frequency is changed.  This mode is still somewhat buggy as we couldn't get things to work as expected, but hopefully this will get some attention in the next FW update.

Don't have time to look into any of this in detail now as deeply involved with how to create a large number of seperate HV amplifiers & DACs in a small space eventually leading to a custom chip to support a very large number of individual programmable HV channels, and so far the Siglent Bode Plot capability has been more than "up to the task".

On a side note, the DIY Logic Analyzer Probe effort has already paid off with the Siglent SDS2102+ in helping trace down a SPI interface bug with an Analog Devices DAC test board. Our little SDS2102X+, which has been "enhanced" with the generous help of others here, has earned a spot and displaced our old analog friend Tek 2465s as the "go to" instrument of choice. Now we just fire up the two 2465s to warm up the CRTs and reminisce with the beautiful green glowing screens, progress has it's sacrifices

Best,

[mawyatt]

Ok Rob, I give 

We only have a 2 channel SDS2102X+

Maybe someday (soon??) we'll move up to the "High Fidelity First Class Traveling Section"

Cheers Mate,

[tautech]

Ok Rob, I give 

We only have a 2 channel SDS2102X+

Maybe someday (soon??) we'll move up to the "High Fidelity First Class Traveling Section"

Cheers Mate,

Really wanna see the full picture of more than a single channel being available to show FRA results ? 
Here rf-loop explores the limits of SDS1104X-E BP:
https://www.eevblog.com/forum/testgear/siglent-sds1x04x-e-bodeplot-ii-(sfra)-features-and-testing-(coming)/

[Berni]

There indeed instruments designed to provide this exact functionality like for example the Agilent 89410A https://www.testwall.com/product/agilent-hp-89410a/ (DC to 10MHz) or some of the older HP Dynamic signal analyzers.

The main benefit of these things is the enhanced dynamic range of something like 120dB and very low harmonic distortion. So they can be used to characterize very precise and sensitive analog circuits, audio circuits etc... But at the same time this is a giant heavy boatanchor the size of an oldschool network analyzer that burns something like 300W to run. So not very convenient for just knocking out a quick frequency plot of an opamp. So even if the performance is not quite there, having such a feature built into a scope is a great thing to have.

The other way to do something similar on a regular scope is to get a signal generator capable of generating a smooth sine sweep and just put that into the scope. Trigger on the sync signal from the signal generator and position the scope waveform so that the sweep starts at the start of the screen and ends at the end, this essentially turns the X time axis into a X frequency axis. If the signal generator can go fast enough you can get a nice fast realtime updating display on the scope screen, useful if you are using this to live tune the frequency response of something by turning pots.

[nctnico]

Sounds more like not investing in the right tools. I have a network analyser from Anritsu which goes from 5Hz to 300MHz and it has switchable 50 Ohm / 1M Ohm inputs.

Which has the disadvantage of not being able to display multistage results from a DUT simultaneously like Bode plot on a multichannel DSO.
In Siglent DSO's with BP the input impedance can be widely specified.

Nonsense! You can buy network analysers with more inputs. My Anritsu has the option to fit an extra analysis channel for example. Also the rerence impedance is adjustable (ofcourse). Please read more about network analysers before making statements which aren't true. DSO bode plot only shows phase / frequency response. A network analyser is a much more sophisticated instrument for analysing frequency dependant behaviour of a circuit.

[RoGeorge]

how to create a large number of seperate HV amplifiers & DACs in a small space eventually leading to a custom chip

How fast should be those DACs?  If not very fast, my first go to thought for how to get many DACs on a chip would be to use a 1 bit PDM (Pulse Density Modulation) followed by an analog integrator for each DAC.

The algorithm to get PDM is very simple, a digital adder, an accumulator and a register that stores the digital input to be converted into 1 bit pulses.  At each step the register is added to the accumulator.  The overflow bit from the adder is the PDM output to be integrated later by an RC low pass or similar. 

This is a small project I did once, that gives to each pin of a microcontroller a better LED dimming than a PWM could do.  If instead of LEDs we put an RC integrator, then we can get independent ADCs.
https://hackaday.io/project/6356-delta-sigma-versus-pwm   
At each step, add the requested duty cycle to an accumulator. When the accumulator overflows, we set the output to high. If it doesn't overflow, we reset the output to low. Then, in the next step, continue adding from where we were left.

[HKJ]

The other way to do something similar on a regular scope is to get a signal generator capable of generating a smooth sine sweep and just put that into the scope. Trigger on the sync signal from the signal generator and position the scope waveform so that the sweep starts at the start of the screen and ends at the end, this essentially turns the X time axis into a X frequency axis. If the signal generator can go fast enough you can get a nice fast realtime updating display on the scope screen, useful if you are using this to live tune the frequency response of something by turning pots.

You can also do it with a signal generator and a DMM with good enough frequency response (or oscilloscope), both connected to TestController. Somebody did that and that made me add logarithmic scales to TC. The scan will not be nearly as fast as directly on a oscilloscope, but you can make precise measurement on the curve.

[mawyatt]

how to create a large number of seperate HV amplifiers & DACs in a small space eventually leading to a custom chip

How fast should be those DACs?  If not very fast, my first go to thought for how to get many DACs on a chip would be to use a 1 bit PDM (Pulse Density Modulation) followed by an analog integrator for each DAC.

The algorithm to get PDM is very simple, a digital adder, an accumulator and a register that stores the digital input to be converted into 1 bit pulses.  At each step the register is added to the accumulator.  The overflow bit from the adder is the PDM output to be integrated later by an RC low pass or similar. 

This is a small project I did once, that gives to each pin of a microcontroller a better LED dimming than a PWM could do.  If instead of LEDs we put an RC integrator, then we can get independent ADCs.
https://hackaday.io/project/6356-delta-sigma-versus-pwm   
At each step, add the requested duty cycle to an accumulator. When the accumulator overflows, we set the output to high. If it doesn't overflow, we reset the output to low. Then, in the next step, continue adding from where we were left.

The initial test device will have at least 64 channels, likely 80, and each channel must be fully independent controlled in absolute amplitude and waveform with 14~16 bits. This is like a 64/80 channel AWG with output range of +-75V, was +-150V. Each channel must be toggled very precisely between + and - so the average DC offset is zero within a few mv at rates up to 10KHz. When the chip is developed the BGA package will limit the number of outputs which hasn't been established.

Thanks, yes a PDM DAC could work, but the required integrator would be limiting when the chip is developed, which is the end goal. Although we are looking into AC coupling to allow a unipolar waveform creation and solves the DC offset assuming capacitor leakage can be managed. The caps are the limiting factor because of leakage and waveform distortion, tend to be physically large, must withstand a high voltage, and required for each channel. We came up with an interesting method to compensate for the AC coupling waveform distortion which compensates all the channels from a single compensation source which would allow a smaller cap for a given level of waveform distortion. The concept involves predistortion of the DAC waveform by means of manipulating the reference voltage. Since these DACs are multiplying types the reference is multiplied by the DAC to render the output, thus all DACs that use the reference can be predistorted regardless of output waveform level assuming a linear system. This predistortion is valid for a given waveform type, but all channels will utilize the same waveform type. The main DAC reference requires a predistortion compensating waveform riding on top of the reference DC level, which can be implement with another DAC or other "analogish" means. Of course you could just implement the predistortion characteristics with each DAC waveform, but this may drive the DAC resolution to higher levels, and each DAC is required to be capable of this added resolution. 

One might think that just preceding the AC coupling which is a 1st order high pass function, with a low pass function would cancel and the distortion result would be eliminated. However, this is not the case as a little analysis shows the HP as  S/(S+A) and the LP as 1/(S+B), so the LP*HP = S/(S*S + S(A+B) +A*B) which clearly is not unity!! 

The solution involves fitting the above mentioned transfer function which is zero at S=0 and zero at S=infinity, to the desired waveform and frequency range to yield a result that approximates a constant over that range. Another way of thinking about this is the AC Coupling HP approaches infinite attenuation as you approach zero (DC) frequency, and the LP approaches infinite attenuation as you approach infinite frequency, so they obviously can't compensate for each other over the entire frequency span!! Haven't seen this done before regarding the DAC reference hosting the correction waveform for passive component compensation, although haven't seriously looked, and we haven't decided yet to file disclosures being too busy with other things at the moment.

Created a simple evaluation test to show the effects of this technique using the AWG (SDG2042X) two channels, one channel had the desired waveform and the other channel had the compensating waveform tailored for the AC coupling characteristics. Passed thru the AC coupling network and the result works very well indeed

Best

[RoGeorge]

Very rewarding indeed when the experiment matches the prediction!   



The digital PDM would have been nice for avoiding the high voltage analog amplifiers at all, would have been worked with just on/off HV switches.  For DC removal, could the Lithium Niobate cell be reversed in polarity at a 10kHz rate or so (also with HV switches, e.g. to switch the +100V power that feeds the HV switches to -100V entirely)?

The integrator C needs to be outside the IC.  Ideally the C would have been the Lithium Niobate cell itself if there's enough capacity (I am picturing the antenna like an array of crystal cells, sort of like it would be an opto-acustic Bragg Cells array, but for microwaves).  Don't know if this can be applied to this beam steering device.  Another advantage for PDM would have been that, in case of too many or too high voltage transistors to integrate on the same chip, a pair or two of HV switching MOSFETs can be placed near each crystal (implemented in an other IC, placed one near each cell, or with discrete transistors) and keep the 80 channels AWG chip entirely low voltage.

With a HV AWG signal out (AM modulated with 10kHz if I understood correctly the crystal control requirements) there will be a need to maximize the power transfer, therefore each cell will need to have an impedance match network, while with the low voltage PDM the signal can be transported like any other digital IO over the PCB upto near each cell, where the HV switches are.  Low voltage I/O signals would be preferable for lower EMI interferences.

Not sure how big should all the cells array be, I assumed the topology would be similar with this one (the big one I guess, if it were to be like the small one seen at minute 17:30 then I guess it wouldn't need high voltage BGA output at all - I've read some many moons ago LiNbO3 can be deposited using IC manufacture technology):
TSP #181 - Starlink Dish Phased Array Design, Architecture & RF In-depth Analysis

Pleading for PDM not necessarily because of some technical reason, but because PDM was my first choice and now I'm attached to that and biased. 

Anyway, I would be very curious to find out more details about the project (if not now eventually later, after any patents secured).  Best luck with it!   

[mawyatt]

Very rewarding indeed when the experiment matches the prediction!   



The digital PDM would have been nice for avoiding the high voltage analog amplifiers at all, would have been worked with just on/off HV switches.  For DC removal, could the Lithium Niobate cell be reversed in polarity at a 10kHz rate or so (also with HV switches, e.g. to switch the +100V power that feeds the HV switches to -100V entirely)?

The integrator C needs to be outside the IC.  Ideally the C would have been the Lithium Niobate cell itself if there's enough capacity (I am picturing the antenna like an array of crystal cells, sort of like it would be an opto-acustic Bragg Cells array, but for microwaves).  Don't know if this can be applied to this beam steering device.  Another advantage for PDM would have been that, in case of too many or too high voltage transistors to integrate on the same chip, a pair or two of HV switching MOSFETs can be placed near each crystal (implemented in an other IC, placed one near each cell, or with discrete transistors) and keep the 80 channels AWG chip entirely low voltage.

With a HV AWG signal out (AM modulated with 10kHz if I understood correctly the crystal control requirements) there will be a need to maximize the power transfer, therefore each cell will need to have an impedance match network, while with the low voltage PDM the signal can be transported like any other digital IO over the PCB upto near each cell, where the HV switches are.  Low voltage I/O signals would be preferable for lower EMI interferences.

Not sure how big should all the cells array be, I assumed the topology would be similar with this one (the big one I guess, if it were to be like the small one seen at minute 17:30 then I guess it wouldn't need high voltage BGA output at all - I've read some many moons ago LiNbO3 can be deposited using IC manufacture technology):
TSP #181 - Starlink Dish Phased Array Design, Architecture & RF In-depth Analysis

Pleading for PDM not necessarily because of some technical reason, but because PDM was my first choice and now I'm attached to that and biased. 

Anyway, I would be very curious to find out more details about the project (if not now eventually later, after any patents secured).  Best luck with it!   

We did look into using a differential type drive with the "cell", it's not LiNbO3 tho (can't say what it is at the moment, sorry). However the "cell" needs to be single ended as one side must be at ground at all times. We also looked into using a "Switched Capacitor" technique where a cap is charged to the peak waveform value, then flipped over creating the negative value. Did a number of simulations on this and it works, but the flipped value is not exactly equal in magnitude to the initial charged value due to some small charge imbalance, this could be compensated by adding some charge to the cap after it's flipped over to balance the resultant output to have zero offset. This technique isn't at the top of list of possible candidate solutions, but still under consideration.

The eventual antenna arrays will have many more elements that the Star-Link dish, and they will be much closer spaced. Although Star-Link could end up using the concept Enough said

Yes LiNbO3 can be deposited using various IC techniques, as can AlN which we used for acoustic resonators. Interesting you mention Optical Bragg cells, this technique was used long ago for the Bulk Acoustic Wave resonator filters we were working with. Dr Ken Lakin of TFR invented a technique of depositing layers of thin film AlN over LiNbO3, AlO and Si as well a Quartz. These thin layers were stacked to create a Bragg Cell reflector at MW frequencies, then the filter layers of AlN were deposited to create the BAW filter. Since the back side of the filter was the Bragg cell reflector these became known as Back Side Passivated BAW filters since the backside could be directly attached to a substrate without affecting the filter. Later the technique was applied to the Top Side so the filter could be plastic encapsulated with standard IC packages like 3 or 4 terminal SOT.

When AlN is deposited over Quartz you can create an Over-Moded Resonator, where the Q of the resonator approaches the Q of Quartz. The general idea is to have a Quartz resonator of typical frequency under 100MHz, then deposited a thin film of AlN on top to produce a resonance of many GHz. If all is done properly the Quartz resonator "pings" the AlN resonator in synchronism with the Quartz frequency and the effective Q of the AlN resonator is improved by many orders of magnitude. We utilized this technique 35 years ago to build a tiny chip level low phase noise fundamental oscillator at ~3GHz with measured PN of -140dBc at 10KHz offset, beating the lowest noise DROs at the time, and in a very tiny package. Everything we did had to be very small, so DROs were not even considered.

Also used LiNbO3 as a optical phase modulator as a Serrodyne Modulator (ideally pure frequency translation without sidebands) used in early Fiber Optic Gyro developments. Fond memories from back then

Thanks for the comments and dialog.

Best,