Yes a capacitor would help against the noise, but I feel they could also just used a resistor divider with much lower values i.e. 180k+59k and still the battery consumption (about 25uA) wouldn’t really be much of a problem, but perhaps though after a very long time in auto power off mode.
With regard to the accuracy of the battery indicator - they rely on the a fixed correction value in firmware together with the values in a look up table - so there’s no calibration done as such. The hack I did on my meter (shown above) shows it could be made much more accurate without changing the hardware and even have higher resolution. But that was only on my meter, or on my stm32 mcu, there's no guarantee it would work on all 121gw’s - now with the divider being so far above the recommended max impedance, but I think it could be made significantly more accurate and really should also have a user calibration implemented for it in FW
After reading a bit more and checking schematics, the 50kΩ maximum input resistance, is only allowed for very longest sampling time (i.e. long sampling time, or low adc clock frequency). I.e. for 24 μs. This is because of internal sample capacitors (total being 8pF, which together with internal and external resistance forms the RC circuit, so the time for sampling need to be sufficiently high to reach actual correct value). Using high ADC clock frequency, or short sampling time, requires significantly lower maximum input resistance, in many case 1Ω-2kΩ. I don't know what settings (sampling time, resolution, adc clock frequency, multiplexing, oversampling / averaging) are used for reading the battery voltage from the divider, but it is possible incorrectly configured in software. But even if it is configured most conservatively possible, the input resistance would still be too high for very accurate measurements.
The schematics is also somehow incomplete. It shows external voltage reference (ZD2), of unknown voltage and model, and R49 is marked as 0Ω, which doesn't make sense.
Additionally, VREF+ and VDDA capacitors doesn't follow application notes. They should be 1μF // 10nF. But on schematics I see single C99 for VREF+ with unknown value, and 1μF // 100nF for VDDA, deviating from the recommended values. It is somehow closish to what the Figure 11 (in 6.1.6 Power supply scheme) in the STM32L151xD STM32L152xD datasheet shows, but not exactly.
And we don't know if the external VREF+ is calibrated at startup against the internal VREFINT in the chip, which is actually pretty accurate, and close in performance to external reference (like LM236).
That datasheet input ADC impedance is not an absolute value ... in some applications can be larger . The battery voltage is very clean , that's why they could skip the input capacitor ( low pass filter ) although this "economy" is questionable .
It is an absolute maximum maximum actually. In fact it only works with this highest value under very specific sampling time and frequency configurations. I recommend reading section 4.4 of AN2834 from ST, and section 6.3.19 of STM32L151xD STM32L152xD data sheet, especially table 63 and table 66, and figure 37, on pages 119-123.