I've just started using my new (to me) SDS1104X-E scope to reverse engineer an EIA/TIA-485 (aka RS485) serial bus. Alas, the serial bus is using 9 bit multidrop/multiprocessor protocol. Briefly, this protocol uses the parity bit to signal and address/command versus data: if the parity is high/mark then the 8 data bits are an address (or command), and if parity is low/space, the bits are data. Some UARTs can handle this directly in hardware, and other UARTs need to set parity to always mark/space and take the interrupt to check the incoming parity to determine address or data.
This is a common 485 protocol in the embedded market. And I have not yet tried to get the Linux ftdi_sio driver to implement this - one headache at a time please.
Alas, Siglent UART decode functionality only includes ODD/EVEN/NONE parity. The standard additional parity options of MARK/SPACE have not been included for some reason, which makes decode a pain because I need to walk through every waveform to figure out the parity. And it often seems to throw its hands up and fail to decode if it thinks there's a parity error.
Can anyone tell me how the serial decode is implemented? Is it application code run by the host processor? Can it be replaced? Is there any chance that Siglent will update the serial decode to add at least "always mark/space" parity option? I know that it is too much to ask for a 9-bit mode that decodes like I2C, but at least fixed mark/space would make my life significantly easier.
As an aside, I've only had the scope for 2 days now, so I haven't figured out the details. I've tried the "Wave Form Save" button on the web interface, but it is not quite what I had in mind. I have about 3 seconds of serial data, sampled at 5MSa/s in 14Mpts of memory - if I have to write my own serial decoder for the 9 bit protocol, I'd like to be able to dump all 14Mpts. Would that be done with SCPI commands?
Pushing my luck here, but because EIA/TIA485 is a differential signal, I run A to channel 1 and B to channel 3, and use Math to generate A-B superimposed on the channel 1 & 3 traces. It would be nice to use the math trace for the Decoder. This analog signal easily shows when the drivers are switched on, pulling the bus a few hundred millivolts from the resistor pull up/pull down and termination one bit time before the start bit. And then the drivers are turned off one bit time after the stop bit. Different devices on the bus have different mark & space voltages, allowing me to sort them out.
Thanks for any help.