Show us your square wave

[rolfdegen]

I only have 150R resistors. But the result is worse than with 51R resistors

[rolfdegen]

Picture from my very old Hemeg HM203-6 20MHz Scope. Max timebase on scope is 0.5usec 

[rolfdegen]

This is a measurement with Rigol 350MHz probe 10x directly at the output resistors..

[RoGeorge]

I don't have a teensy, but I remember from other microcontrollers the output resistance of the MOSFET to be about 40ohms to GND, and about 60ohms for the Vcc side MOSFET (measured with a DMM, by setting the DO to 0, then putting the DMM between the DO and GND, same for DO=1 and the DMM between the DO and Vcc).

So, ignoring the capacitances, might be interesting to see if the edges get sharper if first all 4 DO are tied together, followed by a single series resistor of 39ohms or so.  Also, the GND wire as short as possible (relative to the MCU GND) might help.

[tggzzz]

I don't have a teensy, but I remember from other microcontrollers the output resistance of the MOSFET resistance to be about 40ohms to GND, and 60ohms for the Vcc side MOSFET (measured with a DMM, by setting the DO to 0, then putting the DMM between the DO and GND, same for DO=1 and the DMM between the DO and Vcc).

Look at the datasheet V-I curve for high and low outputs. The curves won't be a straight line, but they will give a range of values.

74LVC1G can source/sink 32mA at 5V (24mA at 3.3V), and 7ohms is a reasonable starting value. Then a little experimentation can be beneficial.

[RoGeorge]

The one I've measured was for an ATTINY104 from an Atmel Xplained devboard, and I guess it was at 3.3V, don't recall if it was at 5 or at 3.3V, but It was nowhere near 10ohms, that I know for sure because I was happy a single DO measured close enough to not need any series resistor for a 50 ohms output.

Don't know for Teensy, no idea what MCU is on it.  Some MCUs may even have adjustable drive strength for DOs, but the idea remains the same.  First put all the DOs in parallel, then add only one series resistor calculated accordingly, such that 4||DO+1R=50ohms, in the hope that the edges might become sharper (compared to the version where each DO has its own resistor).

[rolfdegen]

I programmed the Teensy4 GPIO pins to the smallest value of 23 Ohm and smallest Pad Transition Time (RiseTime) to 1.06ns

[rolfdegen]

I bought an old pulse generator with a fast rise time (40ps BNC version) from Leo Bodnar. I'm curious...

[tautech]

I've ordered an old fast risetime pulse generator (40ps BNC version) from Leo Bodnar. I'm curious...

There's several examples of the V1 Bodnar pulser already in this thread, go have a look. 

[joeqsmith]

My Tektronix pulser shown previously, which has a transistion of <= 25ps, attached to a Siglent 7000.   
https://www.eevblog.com/forum/testgear/show-us-your-square-wave/msg5542619/#msg5542619

[rolfdegen]

Is the pulse in the Tektronix Pulse Generator generated with an avalanche transistor

[Martin72]

I bought an old pulse generator with a fast rise time (40ps BNC version) from Leo Bodnar. I'm curious...

Good decision, that way you'll have something left over for future scopes...
Did you buy it second-hand? It's sold out at Leo's...

[RoGeorge]

Is the pulse in the Tektronix Pulse Generator generated with an avalanche transistor
(Attachment Link)

Sorry for the offtopic, for a second that appeared to me written as:

Wird der Pulse im Tektronics Pulse Generator mit einem Avalanche Transistor erzeugt

Not complaining, but I've spotted quite a few other posts in various languages other than En (from other users).  I'm curious if there is some tool I didn't know for automated posting in another language, or did you just translated that "manually", then edited your post.

I'm aware of Google translate and alike, only wandering if there is some other plugin I didn't know about, or service that auto-translates, and users sometimes forget to activate it, and such the posts that appear once in a while on EEVblog in languages other than En.

[David Hess]

Is the pulse in the Tektronix Pulse Generator generated with an avalanche transistor

No, the S-52 uses a tunnel diode.

[rolfdegen]

New measurement with Teensy4. 4x GPIO outputs connected parallel and 50R to GND (yellow line) and without 50R (red line).
Rigol MSO5104 (350MHz hack) Scope probe to 10x and Scope input is 1M Ohm AC coupling.

[Martin72]

There's several examples of the V1 Bodnar pulser already in this thread, go have a look. 

I took the liberty of repeating the measurements so you can see it at a glance.
I used two pulse generators that I have at home, one is the Bodnar("Leo"), of course, and the other is from the Batronix demo board("DB").
It's pretty fast, but could be even faster if you keep the connection as short as possible.
The oscilloscopes are Siglent SDS3104X HD and Magnova BMO 350.
The bandwidths are 1 GHz and 350 MHz, respectively.

Martin

[rolfdegen]

I bought an old pulse generator with a fast rise time (40ps BNC version) from Leo Bodnar. I'm curious...

Good decision, that way you'll have something left over for future scopes...
Did you buy it second-hand? It's sold out at Leo's...

I asked Leo Bodnar if he still had an old version of the Pulser lying around and he offered it to me at a reasonable price (80 euros including tax).

Leo Bodner Fast risetime pulse generator 40ps (BNC)

[rolfdegen]

Is the pulse in the Tektronix Pulse Generator generated with an avalanche transistor

No, the S-52 uses a tunnel diode.

I translate my posts from German to English with google

[rolfdegen]

There's several examples of the V1 Bodnar pulser already in this thread, go have a look. 

I took the liberty of repeating the measurements so you can see it at a glance.
I used two pulse generators that I have at home, one is the Bodnar("Leo"), of course, and the other is from the Batronix demo board("DB").
It's pretty fast, but could be even faster if you keep the connection as short as possible.
The oscilloscopes are Siglent SDS3104X HD and Magnova BMO 350.
The bandwidths are 1 GHz and 350 MHz, respectively.

Martin

The Batronix MSO demo board is very interesting and a nice playground for electronic nerds

[rolfdegen]

I've now built a pulser with an SN74LVC1G14. The average rise time is 1.07 ns. I'm going to modify the circuit to use three SN74LVC1G14s. I'm curious...

[tggzzz]

I've now built a pulser with an SN74LVC1G14. The average rise time is 1.07 ns. I'm going to modify the circuit to use three SN74LVC1G14s. I'm curious...

Mount C4 on top of the 74lvc14 driving the output; that will minimise the inductance.

Such effects can be important; that's why there are both 0603 capacitors (common) and 0306 capacitors (lower inductance).

[RoGeorge]

I'm going to modify the circuit to use three SN74LVC1G14s. I'm curious...

My guess is it will make no difference if they are put one after the other.  74LV14 being the Trigger-Schmitt type of gate, means they have internal positive reaction, therefore the transition of the output signal is already almost as fast as it can be, so the slope of the input edge doesn't matter much, if at all.

To fasten the edge, I would put all 3 gates in parallel, by placing all 3 chips literally on top of each other, then soldering the pins from all 3 stacked chips in parallel.  There is no danger in damaging the gates with the outputs tied together, in parallel (and no resistors), as long as those gates are always driven by the same input signal.

Once the 3 gates soldered on top of each other, the length of the other traces matters.  Particularly the length to the 0.1uF ceramic.  Cut its terminals as short as possible, and solder it right on top of the 3 stacked gates, directly to the gates power pins.  The GND of the 3 LV gates stacked together should be the single GND star connection point, from where the GND output to the BNC is taken, and also the point where the power supply wires reaches the breadboard, and from where there is a wire to the MCU GND.

It is important to have no wires at all between the 3 parallel gates, because each wire introduces delays, and softens the edges, not because of the wire length, but because of the wires parasitic inductance.  The idea is to keep minimum amount of serial inductance, and minimum ammount of parallel capacitance at the output.  That is why I was suggesting in the previous  (4 MCU DOs + 4R version) to first put all the 4 MCU DOs in parallel, then use a single series resistor, because each TH resistor have considerable inductance when the aim is to achieve fastest possible edges.

Of course, I didn't try in practice, so these are only estimations, and practice might prove there is no visible difference. 

[Martin72]

I've now built a pulser with an SN74LVC1G14. The average rise time is 1.07 ns.

Try this one:
https://www.digikey.de/en/products/detail/diodes-incorporated/74LVC1G17W5-7/3829445
Exactly from this manufacturer.
Why?
See post #565....

[rolfdegen]

I'm going to modify the circuit to use three SN74LVC1G14s. I'm curious...

My guess is it will make no difference if they are put one after the other.  74LV14 being the Trigger-Schmitt type of gate, means they have internal positive reaction, therefore the transition of the output signal is already almost as fast as it can be, so the slope of the input edge doesn't matter much, if at all.

To fasten the edge, I would put all 3 gates in parallel, by placing all 3 chips literally on top of each other, then soldering the pins from all 3 stacked chips in parallel.  There is no danger in damaging the gates with the outputs tied together, in parallel (and no resistors), as long as those gates are always driven by the same input signal.

Once the 3 gates soldered on top of each other, the length of the other traces matters.  Particularly the length to the 0.1uF ceramic.  Cut its terminals as short as possible, and solder it right on top of the 3 stacked gates, directly to the gates power pins.  The GND of the 3 LV gates stacked together should be the single GND star connection point, from where the GND output to the BNC is taken, and also the point where the power supply wires reaches the breadboard, and from where there is a wire to the MCU GND.

It is important to have no wires at all between the 3 parallel gates, because each wire introduces delays, and softens the edges, not because of the wire length, but because of the wires parasitic inductance.  The idea is to keep minimum amount of serial inductance, and minimum ammount of parallel capacitance at the output.  That is why I was suggesting in the previous  (4 MCU DOs + 4R version) to first put all the 4 MCU DOs in parallel, then use a single series resistor, because each TH resistor have considerable inductance when the aim is to achieve fastest possible edges.

Of course, I didn't try in practice, so these are only estimations, and practice might prove there is no visible difference. 

I soldered three SN74LVC1G14s one above the other and soldered a 100n capacitor above. 47R at the output from 74s. My result: 960ns
The circuit was connected directly to the scope input with 50R termination resistor.

[RoGeorge]

Looks like you made the edge even faster than in the previous version! 

Thank you for posting the results.  I've seen something similar with a 7414 in a video from W2AEW, where he's using all the remaining gates to drive the output.  https://youtu.be/9cP6w2odGUc

Seen that video some time ago, and for some reason I was under the impression that he used only one resistor, and that's why I was insisting for only one resistor.  Now I see he used a resistor for each gate.  Not sure where I've seen the 7414 gates in parallel and a single resistor, or if that was just a test idea that came while watching his video years ago. 

Maybe it was something that I only assumed it will work better, or maybe I've seen it in some other schematic, I can't tell.  Writing these because, now I'm puzzled.  Why did he used a resistor for each gate?  Maybe there is something that I'm missing.  Maybe a resistor for each gate makes the edge even faster, or maybe it doesn't matter, I don't know.  The thing is, now I'm not that sure about my reasoning with the series parasitic inductance for each R. 


Anyway, back to your current results, it looks like you may need a faster oscilloscope, or a similar bandwidth scope but analog, not digital.

Saying this because of the small bump before the raising edge.  That is usually a digital artifact, because of the sin x/x interpolation.  If it is possible to disable the sinx/x interpolation, try to see if that bump before the raising edge disappears.  The signal doesn't "know" in advance when the next edge will come, so it can not "ring" before the edge.  Ringing can happen only after an edge has occurred, not before.

That bump before the edge might also be a reflected signal from the previous pulse, but I doubt.  Can be tested by changing the frequency of the pulses, and see if the ringing before the edge moves in another position, or disappears.  Or, by switching to dots mode display while turning off the sin(x)/x interpolation, and observe if the preceding bump disappears.

What I'm trying to say is, the exact value of the raising time might be slightly different than 960ps (if measured with a high bandwidth analog oscilloscope), because the digital oscilloscope tries to reconstruct the edge from very few samples, 7-8 samples for 1ns at 8GSa/s.  While doing so, the oscilloscope assumes the bandwidth of the signal is limited to the datasheet specs, while in any fast edge signal there is still a ton of harmonics at frequencies above the oscilloscope specs, and such the fake ringing before the edge (produced by the digital post-processing of the samples, post-processing that is done to turn those very few samples into a continuous trace on the screen).