Hello, I have finally uploaded schematics v1.1.0 to the repo:
https://github.com/OVGN/OpenIRV/tree/master/docs/schematics
Right, attempt two! this one should allow an I2C or UNI/O EEPROM. I left the I2C option in because they go up to 2MBit. I think with some compression you could store something interesting like the bias values with the sensor. With UNI/O it will only use one IO.
ISC0901B0 requires 84KB for a single bias frame. As I know, original NV3 has 4 table to cover wide camera temperature working range, i.e. we should store 84x4 = 336KB of bias values, i.e. we need 4mbit eeprom. But as I know, you can hardly find 1-Wire, UNI/O or even I2C eeprom of such capacity. For higher resolution sensors, we probably will require even more. Also loading bias table from I2C eeprom will be slower than from QSPIx4@65MHZ, that impacts on statup time.
On the other hand, I think that some kind of attached board identification is needed. That's why I want to suggest having 1-wire smallest eeprom, that will just keep some identification data. In fact, we already have a pull-up resistor R6 at the pin 19 of the X2 connector of M-board. This resistor is planned to be used to identify that original ISC0901B0 sensor board was attached (as there is GND on this pin). We also can use this pin 19 as a communication line for 1-Wire eeprom of the addon board.
I think we can only rely on VCC_SYS being present in the bootloader and I've assumed the IO voltage will start off at 2.5v. Hopefully SENSOR_IO_0 could sense the pull-up to stay compatible with an FPA that needs every pin(?). VGN, would you be interested in using this in the bootloader to ID other sensors?
We can also rely on VCCIO_FPGA and VCCIO_FPGA+SENSOR (controlled over Q3 mosfet). Bootloader can switch VCCIO_FPGA+SENSOR power on, that will power a 1-wire ID eeprom, which will be able to communicate with FPGA over pin 19 of X2 connector, that already have a pull-up resistor R6. Though I think that this resistor should be a bit stronger, i.e. probably 4.7K will be fine for 1-wire. How about AT21CS or 11LCxxx EEPROMs ?
Switching IO voltage after the bootloader could be a problem though. What if you passed VCCIO_FPGA through? These EEPROMs can do 1.8v to 5.5v, I could get rid of the regulator and they'd follow the IO voltage.
This is already done) Just look though the schematics again, BTW I have uploaded lastest v1.1.0 schematics. VCCIO_FPGA+SENSOR is the same VCCIO_FPGA, controlled over Q3 mosfet.