One of the common practical uses of FPGAs in the industry is to emulate digital hardware that will eventually be sent off to be taped out and turned into an actual chip, especially when it needs to interface with complicated analog hardware, either externally or on the same silicon die, that is difficult to simulate accurately in tandem, with all the non-ideal, second-order effects common to any analog design.
The great thing that after the HDL is written once to be tested in simulation on a computer and in emulation on an FPGA, then the exact same HDL code is used to design the final hardware. The HDL code also gets used again when your chips come back from the fab and you need to debug it's internal operation.
And it gets really crazy when you're developing a device with an embedded micro-controller, many times with specialized DSP functionality. Before going to tapeout, during simulation and emulation, you can watch how every instruction you program affects every single bit inside your processor, which itself was just previously programmed in HDL and can still be adjusted. It's programming on a whole other level.
And after that you get to program a compiler...