"NU180" - A U180 drop-in replacement for the 3458A.

[Zondar]

“NU180” is a project to create a drop-in replacement for the "U180" hybrid in the HPAK 3458A 8.5 digit DVM.

The 3458A’s “A3” ADC board contains a custom hybrid, "U180," that is often found to have problems with excessive drift, causing unreliable measurements or even complete failure. These hybrids are absolutely unobtainable, leading to the unfortunate retirement of many machines. It's a plague! Something must be done!

HP designed U180 in the 1980’s. In one package, it includes a custom current-steering chip and a custom resistor array. People on this forum and elsewhere have analyzed U180 to the point that a reverse-engineered replacement became conceivable. The circuitry needed includes a small amount of control logic, analog switches for current-steering, and a set of high-precision resistors. Would a “NU180” have the same performance as U180? It's getting very close indeed!

August 23, 2026 update: One year since the project started, Version 1.1 is ready. It includes many changes such as an improved stack-up, a cut to avoid an optical connector on A3, reduced stray capacitance, and much more. Please find the KiCad files below. The previous V1.0 is still available (see next section), and prior boards by DB4UCH, MiDi and Wanghar, also noted below, remain viable options.

Find the V1.1 files (dated August 8, 2026 and denoted "v11") here:

https://github.com/NuZondar/NU180

Please report any issues. With V1.1 finished, thread-starter Zondar will likely take a break from this project for a while (except for making any needed corrections). But there's a lot left to be explored, so I hope that others continue to make improvements and further contributions. Thank you all!

June 24, 2026 update: After 10 months of work by many participants, a "Version 1.0" design has been prepared that incorporates all proven features plus some that are recognized as potentially beneficial. Files can be found at the bottom of this post, or at:

https://github.com/NuZondar/NU180

(Earlier versions such as V0.4.2 and wanghar's, linked below, remain viable options if you are already building one of them.)

* The design allows the use of standard 805 resistors, or else through-hole or surface-mount bulk-foil resistors for the critical 50k and 80k resistors. The latter were found by participants, e.g. Wanghar and Zondar, to be practically essential to achieve good temperature stability. Finding low-TCR 80k resistors is difficult, however, and may even require custom-ordered parts. The ability to use standard 805 resistors allows building less expensive boards, albeit with lower expected performance.

* Zondar estimated the temperature coefficient of a NU180 board that included bulk-foil resistors for the 50k and 80k's (post 878). Coming in at 0.22 ppm/C (10V reading, 10V scale), this is slightly less than half of the 3458A's specifications (0.51 ppm). NU180 thus appears able to tame the infamous U180 drift problem.

* Sufficient space is provided to allow substituting up to 4 resistors connected in series or parallel per 80 or 50k positions in case builders wish to use small arrays in lieu of bulk-foil's.

* The design includes the use of LT5400 matched resistor arrays to improve performance of the +/- 12V references. These are not inexpensive, but are relatively easy to obtain off-the-shelf.

* The design includes improved noise control measures on all digital components, e.g. voltage regulation, ferrite beads, etc. It's possible to skip the regulation, etc., if desired (jumpers to 5V are provided), but it is recommended for best noise performance. The schematic shows components suitable for 3.3V operation.

KiCad files for V.1.0 are found attached below, along with screen-shots of the board's layout and a pdf of the schematic. The design requires 6 layers, and a thin stack-up is recommended (select a thinner core layer option if available).

May 21, 2026 update: The project is beginning to mature, coming close to the performance of real U180's. It's fair to say that good implementations can deliver 8 digits of performance; a factor of two away from 8.5 digits.

One goal has been to achieve within 2x of original 3458A noise performance in the primary 10V range. Here are noise comparisons between NU180 (wanghar, post 691), a well-tuned 3458A with original U180 (MiDi, post 696), and the 3458A's published specifications (data sheet page 10, "additional errors" chart) for the primary 10V range:

          NU180  U180   Spec
NPLC=1:    0.88  0.68  ~0.75¹ ppm
NPLC=10:   0.42  0.22² ~0.3 ppm
NPLC=100:  0.13  0.07²  0.1 ppm

¹ Difficult to read accurately.
² Theoretical calculated value, e.g. NPLC_10=NPLC_1/sqrt(10), etc. Measured values are higher.

The informal goal of reaching within 2x of the 3458A's native noise performance has been achieved, falling 20-30% away from the spec and a well-tuned 3458A with original U180.

The 3458A's accuracy for the 10V range is quoted as 0.05 ppm of reading + 0.05 ppm of range (spec sheet page 10). A 10V reading on the 10V range would therefore be expected to measure accurately within 1 ppm.

Testing this, early measurements of integral non-linearity were about 0.1 ppm in the positive direction and 0.25 ppm in the negative direction (wanghar, post 684). A later comparison of integral non-linearity, calculated between a NU180-equipped machine and a well-functioning original, was measured to be at or below 0.12 ppm (wanghar, post 741). In summary, the integral non-linearity of the primary 10V range meets and exceeds the 3458A's specification.

The temperature coefficient is expected to be below 0.15 ppm of reading plus 0.01 ppm of range per degree C (spec sheet page 10, after ACAL). Thus a 10V reading should have a TC of not more than 1.6 ppm / C. Wanghar (e.g. post 684) used high-quality bulk-foil resistors for critical values (quoted TCR=0.2ppm). A comparison of his NU180 equipped machine against a genuine U180 machine showed a TC difference of 0.4 ppm.

Current work: A mysterious and puzzling issue remains: a slight difference between reading a short (0 Volts) when NPLC=1 vs. 10 vs. 100. The issue is small enough that it's close to or within spec, but it's consistent across all board variations, and it feels like there should be a positive solution.

Other news: DB4UCH has prepared version V0.5.1, a variation of Zondar's V0.5 redesigned to use matched arrays in a few cases. It may be considered by new builders as an alternative to the V0.4.2 posted below. DB4UCH's files can be found here. (NOTE: No longer recommended for new builders.)

Zondar's V0.5 brings V0.4 up to date plus uses shorter and equalized switch control signal path lengths aimed at better timing uniformity. This version is designed to use surface-mounted bulk-foil resistors for the 80k's and 50k, which are equivalent to the through-hole bulk-foil resistors that wanghar used to achieve high performance. See post 805 and contact Zondar directly for this version. (NOTE: No longer recommended for new builders.)

March 8, 2026 update: A round of second-generation prototypes have been successfully built and tested by several participants. The current designs are now good enough to resurrect a failed 3458A, even if still lacking that last fraction of a ppm in a few performance specs.

The new designs primarily solved a problem found in the CPLD's TTL-like outputs. The  output drivers use N-channel pull-up transistors and have an unstable logic-high output voltage, leading to small but distinct timing issues. The problem was addressed by using a D-type flip-flop with full CMOS output levels for 8 critical control lines.

Another small but noticeable improvement was made by re-arranging certain control signals for improved timing matching amongst switches. The various use of resistor arrays, matched resistors or high-performance foil resistors have all improved performance too. Improved grounding, optional use of a regulator for lower-voltage control signals, optional use of an alternate U180 supply voltage, and more were also included on most updated boards. Here are some links to proven board designs by contributors:

DB4UCH's NU180 V.0.4.1: As of March, people who wish to start with a proven and stable design should probably choose this one. It's based on Zondar's V.0.4 but includes a few newer improvements. Schematic and layout files here. Note that the CPLD code for this version is different, and can be found here.

Zondar's NU180 V.0.4: Files are found at the bottom of this post, along with a photo of one installed instead of the original U180. This second-generation design added CMOS flip-flops to stabilize certain control signals, optional reduced-voltage regulation for the flip-flops, optional clock inversion, improved grounding with an additional ground plane, reduced stray resistance and capacitance on critical nodes, and many other minor improvements. It also allows the optional use of 2512 surface-mount foil resistors for critical values. Unless you are interested in using bulk-foil resistors, you should choose DB4UCH's V.0.4.1 above.

Wanghar's F180 V.7: This design uses through-hole foil resistors for critical values, and due to this shows some of the best performance seen so far. Extensive information including files and test results is found here.

MiDi's X180: This is an improved first-generation design, and tests the extensive use of resistor arrays for better matching. Files can be found here.

January 2, 2026 update: An updated board design based on participant's input is posted below, including a schematic and zipped KiCad files for the layout. This version has been proven fully functional. The layout will show a few warnings and other peculiarities. For example, there are overlapping footprints which allow the use of either 805 or larger resistors in a few cases.

December 23, 2025 update: Participants have cracked the code for achieving reliable, error-free operation. Broadly, we are edging closer to the genuine U180's performance. In particular, we have made good progress stamping out a few anomalies, e.g. a detectable shift in digitized value depending on the selected voltage range. Recent focus is on directions and choices for new board designs.

November 22, 2025 update: Two more participants have created their own well-engineered versions. One, by DB4UCH, has made impressive progress, achieving +/- 0.5 ppm linearity over +/-10V range.

November 4, 2025 update: Participants have made many important contributions to the project. Notably, a second, independent demonstration of good functionality within a 3458A has been achieved by wanghar. A third appears on the horizon too. Still, it's early, and issues such as the infamous 114 error are being studied.

October 17, 2025 Update: NU180 installed! IT WORKS!!! This is a "functionality" prototype that uses less expensive resistors. As such, it's not expected to be super accurate or have zero drift. It's for studying how well things work and to make any corrections or improvements that are found to be needed (some no-doubt will show up). But still, a 10V reference measured about 10V +/-40 uV. That's promising! A version is being prepared that will use custom low TCR resistors where critical.

October 11, 2025 Update: A prototype NU180 board has been finished. The design has left enough room to use 2512 footprints for the high precision 50k and 80k resistors, but the currently-fabricated version uses 1206's so that less-expensive resistors can be used for initial tests.

Your 3458A: Do you have a 3458A that has failed or has excessive drift due to a bad U180? Then join in, and thank you for your interest and any contributions you can make!

[Kleinstein]

With the resistors it is not really about abolute accuracy and super precise matching in the ratios. So no need for 0.01 % parts. It would be more about TC matching and maybe thermal coupling. So more the choice of 1 ppm/K or 2 ppm/K parts.
There are a few parts that don't need much matching relative to each other:
1) the reference scaling for the +- 12 V
2) the ADC resistors, for the slower precision mode (50 K resistors for the input, 4 x 80 K resistors are the reference)
3) the resistors for the fast mode (4 x 20 K  - the 10 K for the input are externally on A3 and thus really good matching difficult
4) the 5 V ref and the ladder part

The ref. scaling part is relevant for the overall TC. This are mainly 2 resistors in an odd ratio. The inverter part is replatively easy as matched equal reistor pairs are common and many choices there. The accuracy of the ratio should not be critical.

The fast mode part is not very high performance anyway (external input resistor and LF411 Buffer). So I would not worry that much here. This would also apply to the switches.

The ladder part and 5 V are for the minor slopes and don't need to be super low TC. Here separate SMD resistors seem very sensible. With the HCT14 in series one should get away with 0.1% parts here.
The tricky part are the resistors for the slow ADC mode. Here value matching is not super critical, but TC matching is, as it sets offset and gain drift. The 50 K resistors would also need to be very linear with little effect of self heating. The 4 x 50 K resistors from U180 are used as a unit and only may replace them directly with 1 really good resistor.  The tricky part would be getting really good TC tracking from the 50 K and 80 K resistors.

I had rather good experiance with ORN type reisistor arrays. The problem is however that standard parts are not 40 K but 20 K, 50 K or 100 K.
As it is only about the ref. currents one should be able to replace the 12 V and 80 K with 15 V and 100 K. AFAIK the +-12 V ref. voltages are only used on the A3 board, for the ADC itself. The only other external part to change would be in the generation of the modulated 5 V supply for the input switch. So one more resistor on A3 would need a change. The scaling from 7 V to 12 V is part of U180 anyway. With the +-15 V ref. case one could than use resistor arrays with 100 K or 50 K for the precision ADC part. e.g. the 50 K as 2 x 100 K in parallel or 100 K for the references as 2 x 50 K in series. Both solution would need 12 equal resistors. As they are used in groups these could also be split over 2 or 4 chips and would not all need to be in one chip.
Another side effect of changing to +-15 V ref. voltage would be that the switches for the reference and input could also be matched, with 2 of the ref. switches in parallel for the input. This way there is less need for low R_on with the switches.
I would consider the change to a +-15 V ref. a real option to consider.

I don't see an absolute need for a negative supply for the switches. The main point for this would not be a slightly negative voltage for the signals - CMOS switches can handle that. The point could be the leakage current. With a voltage more in the middle the currents to the positive an negative side can compensate in part. It is still the question if it is worth the complications.

For the logic I would suggest to still have the flip flops (at least the 4x80 K ref. switches for the precision mode) with external flip-flops. An CPLD/FPGA can have internal delay modulation that can cause INL errors. For the other signals, chances are one could get away with flip flops inside the CPLD.

[Zondar]

Thank you Kleinstein for your extensive response.

On using +/- 15V: These aren't supplied on U180, are they? I see your point, but unless it's critical or can't be done any other way, I'd prefer to stick to the "drop-in" plan for now (i.e., no bodge wires to A3). We can reassess later if no suitable alternatives seem available.

On how the digital logic should be executed: With a quick count, U180 contains about 14x inverters, 16x 2-input NORs, 5x 3-input NOR's, 1x 2-input NAND, 1x 3-input NAND, 2x buffers (not needed here), and 18x flip-flops to be implemented. From my 74xx day's memory, that would require at least 13-16 packages. This is very little for an FPGA, but compared to the analog section it's quite a lot if done in discrete parts. Also, an FPGA has the advantage of being easily reprogrammed. Of course, a mix is possible too. Personally, for better timing I'd take an FPGA over a mess of packages and board wiring. Anyway, this too can be debated further, especially if data becomes available.

I'll think more about the negative voltages. My thought is that it's available and it should be better, so why not use it unless something prevents that. About the only concern is checking where the logic level thresholds are.

A related question: At what potential is Vdd2? I haven't measured it, but it looks like it should be about 4.4V. Is that right?

I've heard that custom monolithic arrays can be made at a cost of a few hundred dollars (I think). Is this a realistic option?

[Zondar]

I decided that picking resistors can be done in reverse: Just find the best-performing options for each resistor, and note any resistor arrays that are available. I'll come up with a table a little later.

Anyway, 80k is very hard to find with fancy specs. But it turns out that 20k resistors can be had easily, e.g. by Vishay, claiming 0.01% tolerance and 0.2 ppm/C. We could interlace the four resistors for better temperature uniformity. Since a number of 80k's are needed, the size and expense would grow rapidly.

The best in-stock single 50k resistor is 0.01% and 0.2 ppm/C. Five 10k resistors at 0.01% and 0.2 ppm/C should do a little better too, but it's getting a bit crazy.

[coppercone2]

how many layers does this board need? Could it work with only 2 layers?

[Zondar]

Four is inexpensive and offers many advantages. It's a no-brainer.

I made a few measurements concerning the allowable board size:

* There's about 20mm from the top of the A3 PCB to the bottom of the cover.
* There's almost no useful horizontal room to grow the PCB beyond the shape of U180 unless it's elevated. There's probably room for a row or two of resistors, though.
* The size of the board can grow significantly if it's elevated and if the board thickness is kept to about 10mm or less.

[coppercone2]

Well, I was thinking of an aluminum nitride PCB if you can do two layers.  Its actually some what strait forward so long its flat and only two layers.

[Zondar]

Oh, that's interesting about the conductivity! But to lose the benefits of 4 layers, wow, that would hurt! I won't say it's impossible, but you're looking at Apollo-age design.

I was thinking of putting thermal pads or paste and a nice, big slab of copper on top. That should do pretty well.

[coppercone2]

I think 4 layers would be very difficult if they are true (monolith)

but if you just have custom hybrids for the resistors on a little PCB of their own it might put it into the realm of HP performance?

I have been saving a little plate of AlN for a while. Of course its probobly not the best grade, but I have been meaning to see how well silver sinters to it.


The problem with hard anodized aluminum substrate is that you need low temp ceramic inks (proprietary), because the aluminum would melt at sintering temps that are DIYable.  There may be enough info online for a well equipped glassier to do it, but I checked out when it says to ball mill your own custom glass firts, and I am not going to go and learn how to sieve things... not a chincilla . For aluminum plating copper so that it can be anodized you need very expensive ionic plating baths (liquid salts)


But regular AlN still blows most stuff out of water.


And electroless copper works OK even DIY (the tin salt being oxidized is the biggest problem). I thought about trying to electroless and electroplate a hard anodized aluminum part to make a PCB that does not require the oven at all..... it would beat out AlN by a factor of 2 or more I think. But I suspect it would be rather fragile and could not be too hot because having a metal core is high expansion. Strain error might be worse.  One day I will find out.




Of course, there is also thick film resistor inks. I do wonder how good the match would be, even if the absolute tempco might be 50ppm, since the material is well linked and of the same type. If its all fired from the same batch. But I doubt it would be that easy. But the inks are way harder then silver conductor, I have gotten zero possitive results there. The silver conductors work OK though, on flat surfaces, pretty easy. If you try your own silver PCB, if your diligent I expect success at 1st or 2nd try. With DIY film resistors I doubt you will get it at the 10th try

[Hydron]

As much as I love AlN, in the realms of standard PCB processes maybe worth considering going beyond 4 layers? Not for routing (you'll end up limited by vias) but to get more copper into it, especially if you can do a stack up with a thick core and the layers near the surface. 6 layers is pretty affordable now thinking of costs, but given the size and criticality of this board going to something more exotic and expensive (e.g. some thicker copper on shallow internal layers) can probably be justified.

I'm guessing you'll also need to be careful about thermal connections to resistor pads etc - having some resistors with lower thermal impedance due to traces and vias than others might not be good for matching! Lots to think about, sounds like a fun project!

I would consider bodge wires to A3 as something acceptable in this context if it helps solve performance issues - someone fixing their 3458A with a U180 replacement isn't going to blink about adding a couple of wires to get 15V onto there!

[Kleinstein]

For using a +-15 V reference there is no need to have the higher supply at U180. One would only need to change the resistors (part of U180 anyway) for the 7 V to 12 V gain step. The LT1001 on the A3 board that is originally doing the 7 to 12 V step would than do 7 to 15 V instead. With a 18 V supply for the OP-amps this should still work.
AFAIK the only change needed on the A3 board would be changing R176. Depending on the supply for the switches one may want to adjust that resistor anyway to adjust the supply to the input switch.

For the logic reporgramming should not be needed. With quite some logic a programmable logic chips looks reaonable. One may be able to get a slightly simplified logic (AFAIK a few parts are unused - only 13 FF should really be needed), but it would still be quite some 74xxx chips. To be on the safe side I would still consider the 4 most critical FF external (e.g. 1 x 74AC175), as FPGAs may not give super low jitter as they tend to be power optimized and interactions can cause delay modulation (one output pin state effecting the delay of others).
A point to check with the FPGA would be the power consumption - a lot of heat would be an issue.
I don't see a logic ouput from U180. So a lower voltage level at the FPGA may work and would only need 5 V tolerant inputs.

Size wise I don't think one would get away with only the U180 outline. The pins to fit in a socket tend to be THT and would thus block much of the area on both sides. Even with quite some unused pins that could be skipped it would not leave much area.

[TERRA Operative]

I have a 3458A that has no drift problems which I think I could swap in a board if needed without too much trouble.
I have upgraded the NVRAM to FRAM, so it would be trivial to make another FRAM to use with the replacement board so I can preserve my current FRAM with its cal constants.

I also have a few Yokogawa 2792 standard resistors (including a 10Kohm model) and a Fluke 731A 10V voltage standard, as well as various other volt/current generators in AC and DC, so testing various things can be done.

The details of actual design work at this level besides PCB layout etc may be beyond me, but I don't mind opening the cover on my 3458A if it will help.

That's all assuming I din't have to touch my existing A3 board with a soldering iron of course....

[iMo]

..A point to check with the FPGA would be the power consumption - a lot of heat would be an issue.
I don't see a logic ouput from U180. So a lower voltage level at the FPGA may work and would only need 5 V tolerant inputs..

As I wrote once re this - the XC9536XL would be a great candidate - it is fast, small number of LUTs and FFs (36) therefore lower jitter, no external bitstream flash needed, 5V tolerant I/O, 44pin small flatpack easy to solder, power consumption - it depends on the clock speed, when not run at 150MHz low (as well as it is a 3.3V device), development in verilog, VHDL or schematic capture (with beefy 74xxx symbols libraries), all via the free ISE14.7, cost $1 each some 8y back..

[Kleinstein]

it looks like the XC9536XL is already obsolete and hardly available anymore.
So a nice part 8 years back, but not longer today.

[iMo]

Yep, but you may still get it, provided you are not sourcing 10000 parts (so still good for initial experiments).
Yes, it is obsolete (and I still wonder why Xilinx discontinued this series)..

CPLDs:
Then perhaps XC2C64A, XC2C128 (not sure all I/Os are 5V tolerant), MAX7000S (like EPM7032S, EPM7064S), MAX II (like EPM240, EPM570) from Altera - but you have to check the 5V tolerances, or the ispMACH4064, ispMACH4128 from Lattice (again needs to be evaluated).

FPGAs:
The smallest FPGA I worked with is the ice40LP384, low power, smallish package, 384LUTs/FFs, needs an external bitstream flash when you want reprogram it (otherwise OTP), but I think it is rather slowish and not sure 5V tolerant.

[Kleinstein]

The ATF150 series is rather high power (like some 60 mA at 5 V), which is not good.
At a first quick glance the ISPMACH4000 family could be an option. This would be 3.3 V powered with 5 V tolerant inputs.

[Kofen]

Great initiative!
Regarding stack up, first viable stack-up is 6 layers, you need your gnd planes intact, no split planes so you have S G P/S P/S G S, there is no point in attempting this on 2 layer and there is zero benefit of alu pcb.
When it comes to outline, I agree with Kleinstein, it will be impossible, but it does not matter, there is quite a bit of space so I would not worry about this.

When it comes to the resistors it is very important to remember it is the ratio stability that matters, this will be hard if not impossible to do with single resistors unless you have very deep pockets, but even simple TDP/NOMCA will most likely function well as they are on the same die, and they are cheap!
For FPGA, don’t limit the choices to extern output, level shifters are for that job. So 3.3v logic FPGA is fine, personally I would look at one of the tiny MAX10, but that is just because I am biased and use them myself.
But as I wrote in the 3458a thread, I think we should break it down, first try to make a 8.5 digit ADC with necessary speed for DC(10 nplc should be a goal at least), then translate to U180.
Resolution, INL and noise is the real challenge here, and if one can’t reach that at 10 nplc, I consider it waste of time and better to sell meter and get a nice 7.5 digit meter.
But flip the negativity, if we do succeed, the platform for a new meter is very much in place and rest is “easy” in comparison so it would really be a great milestone for DIY 8.5 digit. There are ways to do that now as well, with off the self ADCs and oversampling, but it is not easy and requires great care/temp control. But there has already been a lot of work done on DIY MS ADC(Look at kleinstein), if we move this over, improve ratio stability and switch driving(moving from jitter prone MCU to FPGA), we can get quite good results on off the shelf parts. If it can exceed the U180? Probably not, it has the benefit of resistor network and switches in same packages, but if we trade speed to resolution, I think we can.

[exe]

> simple TDP/NOMCA will most likely function well as they are on the same die, and they are cheap!

Idk, datasheet for NOMCA says "Low TCR tracking ± 5 ppm": https://www.vishay.com/docs/60117/nomca.pdf . Also stability is meh, imo: "Stability: Ratio ΔR ± 0.015 % (1000 h at +125 °C)". I think the original U180 can do much better than this, or a special DMM-grade resistor arrays from fluke.

[Kofen]

True, they can and probably will, but in practice, the NOMCA networks tracks a lot better than datasheet numbers. Proof will be in testing, best test is to run them in a thermal chamber and check the ratio stability, several times. One can always order a custom bmf network from Vishay, but we are talking 10k USD figures to start so better start with something cheaper that I suspect will do the job just fine.

As stated, I don't belivie you can replace the U180 with discrete parts easily, but flip it, can you make a relative fast 8.5 digit ADC(10 nplc)? Yes, I think we can.

[coromonadalix]

i have some 9572xp  and some 9536  loll  somewhere   atf 1504 and 1508  where good replacements for the 9572xl, i/o compatibles

as for the new black 3458,    we never saw any teardown on how the logic evolved or got simplified with more recent technologies,  fpga's cpld or else ..

[Kleinstein]

The specs for the resistor arrays are for the whole range of resistor values. This includes relatively low values that have some contribution from the bond wires and high values that are a bit sensitive to leakage. The values in question here are 50 K or 100 K which are more easier values, though more on the high side.
I am using ORN / NOMCT type arrays in my ADCs and the overall gain TC that I get for the 3 units is in the 0.1 to 0.5 ppm/K range, though with one unit going up with temperature and more like 1 ppm/K at 30 C. The gain factor include 1 resistor compared to 2 and 4 resistors used as a gain of 4 and also a few other parts with a little effect.
So I would say the resistor networks have a good chance to work, despite of the loose specs. At that performance level it is hard and expensive to find guranteed specs that tight.

Depending on the use of the array one would average over multiple resistors (like 4 for the references and 8 for the input) and this tends to improve matching. The version I have in mind (with +-15 V ref.) would use 12 resistors from 2 x NOMCT or 4 x ORN / LT5400 with 100 K each for the precision part. Using more resistors for the input path spreads out the heat to get good linearity from the resistor. U180 already uses 4 x 50 K for the input.

For the arrays defintely avoid TaN parts, even though HP in the Journal article says that they use TaN in the U180. The TaN parts like NOMCA showed quite some excess noise, about doubling the ADC noise (at 1 PLC, AFAIR worse at 4 PLC) in my case and I would expect a similar effect for the 3458.
One could also use LT5400 arrays (e.g. 100 K), though these may have an issue with the insulation between the resistors. They are iternaly interleaved in sections to get the very good matching performance.

There are some photos around from the black eddition: the logic is similar to the gate array replacement PCBs with a large FPGA and level shifters and what looks like still a separate 8051 type µC. Just the comparators are replaces with voltage clamping and Ti parts with a +-5 V supply.

[Kofen]

Generally agree on all of this.

I do realise I made a mistake with naming wrong part, I meant TOMC, not NOMCA, Ref: https://www.mdpi.com/1424-8220/23/3/1107

And it is a very valid point, and also supported by testing, I think as well the spec is for the entire range, but for the higher value resistor, the resistor die and construction mastter, and by effect it match closer.

[Zondar]

Catching up:

A stand-alone ADC project and this U180 replacement project share many synergies, especially since the ADC discussions appear to be closely following in the 3458A's footsteps anyway. This is is great for both.

Yes, a 6 layer board is fine too. Besides, with some of those resistors easily costing $20 or more each, the blank board cost will quickly seem unimportant.

Concerning 3.3V FPGA's: That wouldn't just need a few level converters, but also 5V to 3.3V voltage regulation, right? In comparison, the 5V CPLD needs nothing extra, and it's main down-side is just the physically-larger package. But if a 3.3V FPGA is used, then the current-steering switches can probably also use 3.3V.

On the other hand, it's entirely possible that the A3's FPGA, if that's what U180's digital outputs go to, would be OK receiving 3.3V logic levels, since most 5V chips are designed to be tolerant of TTL levels anyway (high logic threshold is usually about 2.7V). I wish I could confirm that, though. Does anyone know what FPGA the A3's one is?

After measuring the space available as noted above, I think it's practical to include some through-hole parts, including smaller ones such as Vishay Z-Foil resistors or taller ones if you are willing to bend the leads.

Even if a larger board area is available, e.g. after adding height, it remains important to keep stray capacitance as low as possible, and that still means tightly packing the critical parts and paths in and around the socket anyway. The FPGA and any power regulation, etc., could easily be off in a corner, though.

I am not aware of machined pins that would cleanly add height. The pins I've previously used for board-into-socket mounting only provide normal IC pin height.

I agree that the 80k resistors and a few others are sufficiently problematic that more extreme solutions might be necessary. I still wonder if a semi-custom monolithic array is possible at not too high a cost?

[Kofen]

Addressing each point:
Yes, a U180 and standalone share so much similarity that the goal should first make that. Even if you choose the U180 footprint and add the analog part on an EVB. 
3.3v fgpa will need a power, but so would almost all since modern parts that are not NRND require lower core voltage, that is the least of the concerns here (but will be once this moves forward due to noise).
If you can run the switches at the lower 3.3v, that is in fact an advantage due to less charge injection, depending on chosen switch.
I would not bet on the FPGA on A3 to trigger reliable on 3.3v, most of the times logic is set to high when VDD*0.7 is met = 3.5v, way too close to comfort.
Problem on the FPGA/CPLD on the A3 is that there are several revisions so you can’t really rely on that.
I am not too concerned about stray capacitance if you do the layout right and get the timing right, using at least 6 l board means you get proper signal lines / transmissions lines if you need the rise time to avoid problems, but it is extremely important to series terminate those to avoid problems.
High socket extenders exist, I’ll try to link when I find it, but nothing wrong with a pcb and tinned copper pins.

Creating a simple two resistor network is expensive, and MOQ of 25, a larger one, a LOT more expensive (still MOQ of 25), so you are looking at 5-10k USD regardless.
But again, don’t dismiss TOMC, they can be parallelled and series for required resistance and are good in the range.

I really don’t see a good way to make this, unless one first commits to make a standalone ADC with the required spec, but then again, that really helps further development of DIY high resolution accusation.

[Zondar]

Ok, I'll agree that it's too risky to depend on 3.3V outputs working with 5V inputs, and apparently semi-custom solutions are a non-starter too.

This has been endlessly debated elsewhere, but what do the experts here say: does putting 4 resistors in series improve anything? My gut says that each doubling, whether in parallel or series, should reduce tolerance (as in standard deviation) by root-2. I'm not sure what the situation is for matching TC's, though - that may be more complex.

Another question I have is how absolute TC relates to tracking TC's. Perhaps there's none at all despite being thermally coupled, but there should be some. For example, you have two "identical" resistors, e.g. Vishay P2TC, with absolute TC's of 2ppm, compared with TOMC's absolute of 25ppm. That's a huge difference! Can anything be said about the expected tracking between two P2TC's 2ppm absolute parts (with decent thermal coupling)?

Kofen, you prefer to do a whole ADC first? That's great, but I haven't seen a public effort along those lines. Is there one? If not, do start one! I'd find that an exciting project too! However, there is a big difference between them: A U180 replacement is highly defined and tightly constrained, exactly because it must fit into a particular socket and must directly replace relatively well-understood circuitry. A from-scratch 8.5 digit ADC is relatively unconstrained and undefined, with many potential directions being possible, and of course it's more involved over-all. A U180 replacement may not fully succeed (and neither may an 8.5 digit ADC), but the path to a prototype is far more clear. Anyway, there is so much overlap between the two, and room for both.

Edit: Thinking about parasitic capacitance, when steering current, modest stray capacitance may not be too harmful. That does beg the question of why HP made a fancy hybrid instead of just having a separate resistor array. I had assumed a goal was to achieve those short bond-wires instead of board traces. But perhaps thermal coupling between resistors and switches was the main reason.