Need Help Understanding TL494 Voltage Error Amplifier and Adjustable Voltage Con

[Andy Chee]

Besides, is anyone able to tell what exactly that part of the circuit is for (the part in the green box, with the input into pin 1 included)?

All voltage regulators (linear and SMPS) compare a sample of the output voltage to a fixed voltage reference.

When the output voltage goes higher than the fixed voltage reference, the circuit cuts back the output.
When the output voltage falls below the fixed voltage reference, the circuit increases the output.

Regulation!

It is conceptually no different to a thermostat temperature regulator.

[max.wwwang]

Besides, is anyone able to tell what exactly that part of the circuit is for (the part in the green box, with the input into pin 1 included)?

All voltage regulators (linear and SMPS) compare a sample of the output voltage to a fixed voltage reference.

When the output voltage goes higher than the fixed voltage reference, the circuit cuts back the output.
When the output voltage falls below the fixed voltage reference, the circuit increases the output.

Regulation!

It is conceptually no different to a thermostat temperature regulator.

Thanks. I’m well aware of that. What I’m asking is, how is regulation done exactly and specifically in this case?

[Edit: Figured out, see Reply #19.]

[Andy Chee]

Thanks. I’m well aware of that. What I’m asking is, how is regulation done exactly and specifically in this case?

In this specific case, you actually need the datasheet to see what else is internally connected to the junction of the output of the two opamps.

[max.wwwang]

To facilitate analysis, attached is the same circuit based on the more detailed block diagram (with the Error Amp 1 sub-circuit copied in the box).

[MariuszD]

Looking closer at the (lower) op-amp and its voltage gain, I ended up with something in the form of:
$$V_o=a V_i + b$$
So the gain is dependent on the input voltage, not a neat constant. 

It is not possible for the gain to depend on the voltage; moreover, the formula you wrote does not include such a dependency.

[MariuszD]

Looking closer at the (lower) op-amp and its voltage gain, I ended up with something in the form of:
$$V_o=a V_i + b$$
So the gain is dependent on the input voltage, not a neat constant. 

It is not possible for the gain to depend on the voltage; moreover, the formula you wrote does not include such a dependency.

@max.wwwang @ommsiva

You skipped learning about simple regulators and now you have difficulty understanding it with a complex example. In the SMPS design materials, you won't find this knowledge because it's something everyone learns earlier.

Let's take a simple example of a linear regulator.


I deliberately set a low amplifier gain and a high resistance R5 so that you can see how it works.

When the load current I1=1A appears, the voltage at the reg_out point drops. the voltage at point in_n also drops and the difference at the amplifier's input increases. The amplifier amplifies this difference by 100x, and at the amp_out point, a voltage rise appears that compensates for the drop caused by the load.

Real amplifiers have much greater gain, but the principle is the same.

Second example without an amplifier, the voltage drops almost to zero and the current does not reach 1A.

[ommsiva]

Dear Sir,

I also Meant the Same. Thank you for your illustration.

[MariuszD]

Take my simulation from LTSpice, try to run it and change the parameters.


What does the 51k resistor do in the first schematic? It reduces the gain of the error amplifier. In my example, I added R6 which serves the same function. What does it change? The gain is lower, the regulator works worse, and the voltage drop under load is greater. The likely reason for adding this resistor is to avoid oscillations, but this is not a sensible/recommended approach; it is advised to ensure that the gain for DC is maximized. And to achieve stability, the amplitude-phase characteristic is shaped only in the high-frequency range.

[ommsiva]

Dear Sir,

Thank you.

My understanding is that by adjusting the feedback resistor to 10 kΩ, I can obtain a 5 V output in your simulation files.

Similarly, referring to my first question regarding output-voltage adjustment, my inference from this simulation is that the output voltage can be adjusted by changing R8. Is my understanding correct?

I have also attached the simulation results for your reference.

[armandine2]

..build a tester, might help in your understanding of the chip - though I failed to follow Richard's instructions, you may have more joy

[MariuszD]

My understanding is that by adjusting the feedback resistor to 10 kΩ, I can obtain a 5 V output in your simulation files.

At this moment, you don't have a functioning circuit, just a saturated transistor.

Notice that in my schematic, the power supply V2 has only 5V, which is too low for such a regulator to output 5V. Change V2 to a higher value, for example, 30V.

At the input in_p, there is 0.5V; to obtain 5V at the output, the divider R1,R2 must divide by 10, for example, 1kΩ and 9kΩ.

Since the amplifier has low gain, it won't give exactly 5V. If you go into the amplifier properties and change Avol to 100k (100000), which is closer to real amplifiers, it will be 5V.

Similarly, referring to my first question regarding output-voltage adjustment, my inference from this simulation is that the output voltage can be adjusted by changing R8. Is my understanding correct?

That's right, you can adjust the voltage by changing R8, but with this method, you won't get less than 2.5V because that's what you'll get if you set R8=0.

Derive the formula for voltage as a function of R8.

By replacing R3 and R4 (in my simulation) with a potentiometer, the voltage can be adjusted from zero.

The 5V regulator with a high-gain amplifier will work like this:


The input voltage of the amplifier is below 1mV, so in simplified terms, it is said that the amplifier strives to achieve 0V at the input.

[max.wwwang]

Looking closer at the (lower) op-amp and its voltage gain, I ended up with something in the form of:
$$V_o=a V_i + b$$
So the gain is dependent on the input voltage, not a neat constant. 

... moreover, the formula you wrote does not include such a dependency.

$$V_o / V_i = a + b / V_i $$

Thanks for taking the time to illustrate with an LTspice simulation, which I should development a habit of using...

I have a very specific question here:

There is a 0.7mA current source shown in the block diagram, replicated in this isolated subcircuit.
How would this current source affect the behaviour of this circuit? Suppose the voltage on the inverting input is also Vo/2, will this current be drawn through RF, or from the output of the op-amp, or a combination of both?

My guess is, since the ideal opamp has 0 output impedance, and has its power source, this 0.7mA current will entirely be sourced from the opamp. The problem with this is then, if so, with or without it, there will be no difference to the whole circuit (or the IC), which is impossible to be true, so would disprove my understanding. But why?

(Except for this last question, I think I've understood the working of this IC at the block diagram level. Thanks to @ommsiva for starting this topic.)

[Edit: more thoughts on the above question – I think my guess is probably the correct answer, assuming no voltage drop across the diodes. This means that the 0.7mA current source is solely due to the two diodes (otherwise would not be needed). But thoughts are welcome.]

[More edit: I figured out – assuming ideal diodes with 0V voltage drop, the 0.7mA current source only turns the otherwise source-only opamp back into its dual mode, i.e. source and sink, but with a 0.7mA ceiling for the sink mode. There will be sight difference from this due to non-ideal diode (and opamp), but the general principle and design intention should remain. But now I also realised a conceptual error in the block diagram: The output of the two opamps is internally connected to ground only though the 0.7mA current source. This must not be the case because if so, voltage on Pin 3, i.e. the input to the internal PWM comparator, would always be 0V. One option for the correction would be omitting the ground symbol on the left side of the current source.]

[MariuszD]

From most outputs, we expect them to be able to both source and sink current. The direction of the current thru resistor Rf will depend on the output voltage. If there were no current source, it would not be possible to obtain voltages below 2.5V because the current thru the Rf resistor would have nowhere to flow.

[ommsiva]

Looking closer at the (lower) op-amp and its voltage gain, I ended up with something in the form of:
$$V_o=a V_i + b$$
So the gain is dependent on the input voltage, not a neat constant. 

... moreover, the formula you wrote does not include such a dependency.

$$V_o / V_i = a + b / V_i $$

Thanks for taking the time to illustrate with an LTspice simulation, which I should development a habit of using...

I have a very specific question here:

There is a 0.7mA current source shown in the block diagram, replicated in this isolated subcircuit. (Attachment Link)
How would this current source affect the behaviour of this circuit? Suppose the voltage on the inverting input is also Vo/2, will this current be drawn through RF, or from the output of the op-amp, or a combination of both?

My guess is, since the ideal opamp has 0 output impedance, and has its power source, this 0.7mA current will entirely be sourced from the opamp. The problem with this is then, if so, with or without it, there will be no difference to the whole circuit (or the IC), which is impossible to be true, so would disprove my understanding. But why?

(Except for this last question, I think I've understood the working of this IC at the block diagram level. Thanks to @ommsiva for starting this topic.)

[Edit: more thoughts on the above question – I think my guess is probably the correct answer, assuming no voltage drop across the diodes. This means that the 0.7mA current source is solely due to the two diodes (otherwise would not be needed). But thoughts are welcome.]

[More edit: I figured out – assuming ideal diodes with 0V voltage drop, the 0.7mA current source only turns the otherwise source-only opamp back into its dual mode, i.e. source and sink, but with a 0.7mA ceiling for the sink mode. There will be sight difference from this due to non-ideal diode (and opamp), but the general principle and design intention should remain. But now I also realised a conceptual error in the block diagram: The output of the two opamps is internally connected to ground only though the 0.7mA current source. This must not be the case because if so, voltage on Pin 3, i.e. the input to the internal PWM comparator, would always be 0V. One option for the correction would be omitting the ground symbol on the left side of the current source.]

Dear All,

I admire all of you and the way you think. Many of the ideas and approaches discussed here are things that no one would have taught me otherwise. Alongside this, I am learning various avenues and different ways of analyzing and solving problems.

Thank you all for sharing your knowledge and insights.

[MariuszD]

I built the aforementioned board, setting the voltages and currents was not a problem.

EDIT: It looked like the circuit was unstable, but it turned out that the wrong capacitor was included in the kit.

[Andy Chee]

Also, in case people haven't done their research, the schematic being discussed is within the TL494 application note;

https://www.ti.com/lit/an/slva001e/slva001e.pdf (page 24)

[max.wwwang]

With a bit more work, I realised the error amp 1 sub circuit is equivalent to (I have been slow!):
So its voltage gain is (as discussed above, dependent on \$V_{i1}\$):
$$\frac{V_{o1}}{V_{i1}} = \frac{53}{3} - \frac{125}{3V_{i1}}$$So to answer your question 1, this amplifier is neither inverting nor non-inverting (or is both ... and ...). It is inverting for certain \$V_{i1}\$ range and non-inverting for another \$V_{i1}\$ range. The 'neutral' point is when the input voltage is about 2.358V, when the gain is 0.

That's why I said you don't really need to care whether it's inverting or non-inverting.

[MariuszD]

So its voltage gain is (as discussed above, dependent on \$V_{i1}\$):

The gain is not dependent on Vi; the amplifier simply has two inputs and different gains for both inputs. You made the incorrect assumption that there is only one gain, and based on this mistake, you are misinterpreting the incorrectly transformed formula.

$$V_{o1} = (\frac{51000}{3060}+1)V_{i1} - \frac{51000}{3060}\frac{V_{ref}}{2}$$

$$V_{o1} = K_{i1}V_{i1} - K_{i2}\frac{V_{ref}}{2}$$
gains:
$$K_{i1}=\frac{51000}{3060}+1$$
$$K_{i2}=\frac{51000}{3060}$$

So to answer your question 1, this amplifier is neither inverting nor non-inverting (or is both ... and ...).

If we were to interpret the amplifier in isolation from its function, it would be so. But this is an error amplifier for which Vref is constant and the input voltage is the output voltage of power supply, and therefore at the input it is a non-inverting amplifier.
[/quote]

That's why I said you don't really need to care whether it's inverting or non-inverting.

If it doesn't matter, replace Vref with Vi1.

[max.wwwang]

So its voltage gain is (as discussed above, dependent on \$V_{i1}\$):

The gain is not dependent on Vi; the amplifier simply has two inputs and different gains for both inputs. You made the incorrect assumption that there is only one gain, and based on this mistake, you are misinterpreting the incorrectly transformed formula.
$$V_{o1} = (\frac{51000}{3060}+1)V_{i1} - \frac{51000}{3060}\frac{V_{ref}}{2}$$ $$V_{o1} = K_{i1}V_{i1} - K_{i2}\frac{V_{ref}}{2}$$
gains: $$K_{i1}=\frac{51000}{3060}+1$$ $$K_{i2}=\frac{51000}{3060}$$

I don't understand why it's a problem in us looking at the same circuit from different perspectives. I don't get where my "mistake" is.

As I said – and this is my personal view or preference (which by no means applies to anybody else) – I don't care what it is called as long as I have understood how it behaves. It's a bit like the question of whether someone should be called CEO, president, or boss – choose whatever you fancy. 

This discussion is becoming more interesting than I though would be.

@ommsiva
By the way, since this circuit is from the application note, a close read of its section 5 would be very beneficial.

[mawyatt]

In the circuit above, since the op-amp forces the inverting and non-inverting inputs to be equal (linear), a little analysis shows that Vo1 is zero when Vi1 is +2.35849V. This is the minimum Vi1 can be allowed so the output Vo1 is equal or above zero. Vo1 will increase with a gain of 17.6667 above that until the op-amp (saturates) and diode drop can no longer deliver the required Vo1 to keep the negative feedback loop linear, then the inverting and non-inverting inputs of the op amp deviate (no longer linear).

Anyway, hope this helps.

[max.wwwang]

In the circuit above, since the op-amp forces the inverting and non-inverting inputs to be equal (linear), a little analysis shows that Vo1 is zero when Vi1 is +2.35849V. This is the minimum Vi1 can be allowed so the output Vo1 is equal or above zero. Vo1 will increase with a gain of 17.6667 above that until the op-amp (saturates) and diode drop can no longer deliver the required Vo1 to keep the negative feedback loop linear, then the inverting and non-inverting inputs of the op amp deviate (no longer linear).

Anyway, hope this helps.

That helps. Thanks.

I'd be keen to hear your view on –

1) what I identified as an error in relation to the earthing symbol on the left hand side of the 0.7mA current source in the block diagram; and

2) what effect this current source has in the intended behavior of this circuit.

I feel pretty confident with my understanding, but shall, as always, remain open to the possibility that I might have missed something.

[mawyatt]

1) Believe the top of the current sink should be connected to the ground symbol, thus 0.7ma shunted to ground.

2) Its likely to keep the op-amp output always suppling current rather than sinking (which it can't due to the series diode), and always supplying current thru the diode so the op-amp output always sits at least a diode drop above ground when still in linear region.

Best

[max.wwwang]

1) Believe the top of the current sink should be connected to the ground symbol, thus 0.7ma shunted to ground.

Thanks. I presume you are referring to the circuit in Reply #41 (the earthing symbol that your are suggesting, was deliberately omitted). Not sure if you will change you view if looking at the (fuller) picture in Reply #28.

Why my suggestion of there being an error is because, with this earthing, the positive input of the PWM comparator will be permanently tied to ground, which would effectively disable both error amplifiers.

2) ... and always supplying current thru the diode so the op-amp output always sits at least a diode drop above ground when still in linear region.

This is a very good point regardless. It aligns with my understanding that, to answer my own question in some way (as I did already), the output of the opamp will be 'prioritized' in supplying this current, essentially without the current source affecting the behavior of the rest of the circuit.

[mawyatt]

1) Believe the top of the current sink should be connected to the ground symbol, thus 0.7ma shunted to ground.

Thanks. I presume you are referring to the circuit in Reply #41 (the earthing symbol that your are suggesting, was deliberated omitted). Not sure if you will change you view if looking at the (fuller) picture in Reply #28.

Why my suggestion of there being an error is because, with this earthing, the positive input of the PWM comparator will be permanently tied to ground, which disables both error amplifiers.

2) ... and always supplying current thru the diode so the op-amp output always sits at least a diode drop above ground when still in linear region.

This is a very good point regardless. It aligns with my understanding that, to answer my own question in some way, the output of the opamp will be 'prioritized' in supplying this current, essentially without affecting the behavior of the rest of the circuit.

Yes #41.

See post #28, its shown correctly there. In this schematic you can see the current sense comparator (#2) and the error amplifier both have series diodes, this is a diode OR which allows either to set the PWM comparator level.

Best

[max.wwwang]

Yes #41.

See post #28, its shown correctly there. In this schematic you can see the current sense comparator (#2) and the error amplifier both have series diodes, this is a diode OR which allows either to set the PWM comparator level.

I suspect your are missing my point. I see all that you are saying, including the 'OR' of the two error amp outputs.

What I'm suggesting is that connecting the + input of the PWM comparator to ground through this current source means it will always have 0V voltage (at least so conceptually), making everything else connected to it useless (which I believe is impossible to be true).