[Edit: see revised analysis in #74.]
I should correct myself again on what I said earlier that the internal 0.7mA current source will 'prioritize' the output of the opamp (through the diode). (My apologies – it's a learning journey to myself as well.)
Looking at the equivalent circuit of the ideal opamp, its output is modelled as a current source (rather than a voltage source). This means that there is no limitless current to be source from its output that can be prioritized (due to low impedance), and this opamp output and the 0.7mA outside the will need to reconcile with each other, which – when the reconciliation fails – has to be accommodated by the feedback loop, as far as it is capable of.

[Picture courtesy of
Microelectronic Circuits]
One question arises.
Suppose the voltage on pin 1 goes very low, for example 0V (which is possible if the upper end of R8 breaks open), the opamp will try hard to match this voltage at pin 2. But the best it can get will be 0V at pin 3, which only gives pin 2 voltage of 2.36V. (This gives a current of 46uA through RF.) Due to the difference between 0V on the non-inverting input and 2.36V on the inverting input, the opamp will desperately try to sink current, but only in vain due to the diode. This means it will be saturated with its output at 0V, with no current through the diode.
Now there is a shortage of 0.7-0.046=0.654mA in the required 0.7mA. I presume the result will have to be, due to compliance constraints, that the 0.7mA current source becomes a 46uA current source, the best it can do to 'comply' (because obviously, it's not ideal).
Do you think so? (This is the question.)
This also demonstrates that, due to the diode, the opamp may operate as a voltage comparator (i.e. saturated) with certain input voltages at pin 1, when the golden rule of virtual short no longer applies.
(All pin identifications are those of the TL494 IC, which are different from those in the ideal opamp model above.)
Edit:
Based on this understanding, there are the following distinct operating modes corresponding to the input voltages (or voltage ranges) at pin 1:
- Pin 1 voltage <2.36V / opamp saturated (working in the voltage comparator mode) / voltage at pin 3 = 0V / 0.7mA current source is forced to comply. (In this mode the voltage at pin 2 will refuse to go under 2.36V)
- As soon as Pin 1 voltage becomes >=2.36V / opamp working as opamp with negative feedback (virtual short applies) / voltage at pin 3 = 0V / there will be a fight between the opamp and the 0.7mA current source, where the 'loser' (most likely the opamp) will be forced to comply.
- Pin 1 voltage =2.5V / as above / as above (this is the desired point)
- As soon as Pin 1 voltage goes >2.78V / as above / voltage at pin 3 reaches 5V / the required 0.7mA will most likely be satisfied by the opamp, which also supplies the current through RF. (This is when the PWM outputs are turned off – or earlier, depending on the exact voltage threshold)
(For all pin 1 voltages above 2.36, the opamp will always in the opamp mode, and the virtual short golden rule applies.)
1)My understanding is that the op-amp employed in the lower part of the schematic is operating in an inverting configuration. But why is it configured this way? The only reason I can think of is that it ensures the voltage at inverting terminal always remains lower than the non-inverting input. Please correct me if I am wrong.
As demonstrated above, the error amp 1 subcircuit (all included as a black box with pin 1 voltage as input and pin 3 voltage as output) works as either a nil gain converter (output = 0V) or non-inverting converter (positive output voltage, with positive input voltage), depending on the input voltage level. I still don't understand why its categorization is so important to you, but fine.
(Note that this is a revised interpretation from what I gave earlier, based on a refined understanding and an analysis at a more detailed and more accurate level.)
why is it configured this way? This is a hard one, depending on what exactly you mean, and also depending on the mode of thinking we are in. We are analyzing an existing circuit, with all components specified. So we are in a sort of 'reverse-engineering' mode of thinking. Working from all the given information, based on the established theories, we get the desired outcome (or verify if the outcome either by analysis, simulation, or prototyping, is what we expected). That's why. But if we are designing this circuit from scratch, that's an entirely different story.
2)... I still cannot literally understand why there should be a 0.7 mA current source.
To answer this in some way -- first remember why 0.7mA was chosen (as a design choice) must have been due to many factors, some of which are possibly not relevant to, or seen in, this example. Then, as demonstrated above, 0.7mA should be taken as its nominal capacity, and it can often be restrained to comply so will be supplying a less current (it's not an ideal current source).
3)My understanding is that R1 = 1 kΩ should be made variable to adjust the current min-10A, and R8 should also be made variable to adjust the output voltage . Is this correct?
Yes
My advice in short:
1) learn and understand the golden rules of opamp;
2) read the datasheet, again and again, over and over.