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Before changing anything else in the circuit, I noticed that the voltage measurement through IC3C and the ADS1115 is a bit wonky if no voltage source is attached. The display of the load constantly flaps between 9mV and 13mV so I first measured the output of IC3C and found some funny business going on (see SDS00002.png).
I then added a 10k resistor between pin 8 of IC3C and the base of T2 and then the base of T2 looked like SDS00003.png.
After that, I added a 10nF ceramic capacitor between the base of T2 and pin 9 of IC3C and now the base of T2 looks like SDS00007.png.
That 8.6 something Hz is so slow, I was even able to see it on the BM786 bar graph.
Obviously I have absolutely no idea what I'm doing
so if anyone has suggestions where this could be coming from and how to filter it out, I'd be grateful 
The inputs of IC3C are quiet so it seems the opamp is acting up a bit. If I apply voltage to the load's input, things smoothen out and everything is hunky dory.
thanks once again!
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What's the point of T2 if it's just some few-kΩ RC filter being driven?
I think you may have a small problem here because T2 bias drops to basically zero when the output is close to ground. A CMOS rail to rail output (i.e. what's in the chip) is probably the best solution for close to ground operation. -
What's the point of T2 if it's just some few-kΩ RC filter being driven?
I think you may have a small problem here because T2 bias drops to basically zero when the output is close to ground. A CMOS rail to rail output (i.e. what's in the chip) is probably the best solution for close to ground operation.
well that's a valid point. T2 is part of a protection circuit someone has come up with a while ago to not exceed the ADCs input voltage no matter what. also it helps a bit at outputting true 0V to the ADC, i think. in this case, i could leave it out as the opamp itself has only got 5V max output voltage due to its supply voltage. also the series resistor to the ADC input helps if voltage exceeds the limits (the ADS1115 has internal clamping diodes). Also it seems that I don't even need IC3C at all and could simply connect the voltage divider from the input directly to R37.
so i did that an bodge-bypassed IC3C, removed T2 and R35 and now the output of the voltage divider R30/R32 is directly connected to R37. unfortunately that changed diddly-squat - display is still flapping between 9-13mV with nothing connected, but now if I connect a voltage source to the load, some offset seems to be always there, of around 5mV. IIRC there was no offset before, as soon as a voltage appeared at the input.
hmmmm
scratching my head, life is difficult if you have no clue what you're doing
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I just noticed T2+IC3c configured as a follower, ditto IC3b+T11- these are notoriously unstable. So you're right to be rid of them.
In between samples isn't the contol loop open? It will probably ring everytime it is opened and closed. I'd consider an analog contro loop "disciplined" by the digital loop. -
I thoroughly recommend looking up Jay_Diddy_B's previous posts on electronic loads. Back when I was simulating one to build (never got around to that!) they were invaluable. Several things of note:
* Add snubber networks across the output
* Give the opamps a -ve rail. This helps them discharge the MOSFET gate capacitance quicker and improves bandwidth
* Dont simply "slug" the opamp with a capacitor from output to -ve. Add an R-C network that improves the phase/gain response. Simulate this in SPICE using AC measurements.
* Dont just use an old slow opamp like the LM324. You want well defined bandwidth.
edit: Found the thread - https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/ -
maybe ti is right, it's their product
btw, M+- rails are already connected (so what they point is useless, you can't disconnect the v rails for unused opamp)
putting in non-symmetric scenario 1/2V+ on IN pin i found this doubtful as principle (too many unknowns, like some pick'and place putting wrong value or bad soldering or offset problems or imprecise resistore+offest), so leaving nc the input leaves no marge for that type of error
their scenario is good for teching imho, in real life, NC is better.
maybe the connection output>>IN- is interesting to apply in one-rail supply scenario
i'll stick to NC's because if i need to 'prototype' that unused amp, i don't bother with non-useful components and tracks, some opamp with non-connected inputs/outputs will never ever fry, that's only legend. but will fry if some output or input is played with
thanks for pointing their recommendation, first time i see this