What I'd like to know, is whether I should try to minimize supply pin to capacitor distance, or say the loop length/area from supply pin to capacitor to ground pin, and why.
Simple theory says that supply pin to capacitor distance, because the ground end of the capacitor only needs the ground potential reference to work, with theoretically no current at all. But what say other practical considerations?
The above diagrams showing how package size affects the minimum impedance point is just such a practical consideration. Similarly, when one uses two or more capacitors of different sizes, constructions, or dielectrics, their interaction (and nonzero ESR and ESL) often creates a new impedance maximum at high frequencies (above where the two minima would be separately). In the case of current microcontrollers running at tens or hundreds of MHz, that new maximum can hit the internal switching rate (clock frequency), making the pair less effective than the bigger capacitance one would be alone. Many of you know these effects much better than I do; I only know it can happen. But it does show that one should never trust theory blindly, always check.