USB physical layer signals

[joniengr081]

I'm curious about the physical layer signals for USB on an FR4 PCB.

For USB 2.0 operating at 480 Mbps, the data pins (D+ and D-) form a differential pair. With double data rate (DDR) or sampling on both edges, this translates to a differential signal with a clock frequency of 240 MHz. Because there is only one differential pair for data in USB 2.0, it look like that USB 2.0 is not duplex, right ?

The USB 3.0 has two additional differential pairs one is SSTX +/- and the other is SSRX +/-. These two additional differential pairs are also called supper speed differential pairs. The USB 3.0 is operating at 5.0 Gbps. I am wondering about the physical layer signals for USB 3.0.

This means that in total there are three differential pairs for data in USB 3.0.

D+ and D- operating at 480 Mbps
SSTX+ and SSTX- operating at ___________ ?
SSRX+ and SSRX- operating at ___________ ?

What is the clock frequency or pulse frequency of these two additional differential pairs in USB 3.0 ?

[tszaboo]

USB 2.0 and 1.1 is half duplex.
3.0 and higher is operated at a frequency that nobody knows how high, because it's impossible to figure it out due to the mess they made with the naming. USB 3.0 has a backup USB 2.0 signals, and most cables do. Some don't. Some has only those signals. Some is only good for power. Good thing it's universal.

[joniengr081]

There should be some maximum bit rate that each super speed differential pair can handle.

SSTX+ and SSTX-
SSRX+ and SSRX-

How do we get 5 Gbps on USB 3.0 ? It's only with SSTX/SSRX or also with D+/D- differential pairs in addition at SSTX/SSRX ?

[Doctorandus_P]

The USB 3.0 is operating at 5.0 Gbps.

SSTX+ and SSTX- operating at ___________ ?
SSRX+ and SSRX- operating at ___________ ?

Well, if your particular variant is operating at 5.0Gbps, then those signals are probably 5.0Gbps, unless there are multiple pairs running in parallel, or if the marketing department decided to add full duplex 2.5Gbps, to 5.0Gbps because bigger numbers are more impressive.

[joniengr081]

USB 3.0 operating at 5Gbps is full duplex 5Gbps ? mean both SSTX and SSRTX can have 5 Gbps at the same time ?

or

SSTX and SSRTX can have maximum 2.5 Gbps at the same time in their own direction in USB 3.0 ?

When USB 3.0 is plugged in, D+ and D- have no data at all ?

[langwadt]

USB 3.0 operating at 5Gbps is full duplex 5Gbps ? mean both SSTX and SSRTX can have 5 Gbps at the same time ?

or

SSTX and SSRTX can have maximum 2.5 Gbps at the same time in their own direction in USB 3.0 ?

When USB 3.0 is plugged in, D+ and D- have no data at all ?

usb2 hs is 480Mbit half-duplex, usb3 is 5Gbit full-duplex

usb3 can do everything with just the sstx/ssrx lines (if both ends are usb3 else if falls back to usb2 on the d+/d-)

[joniengr081]

I found somewhere that USB3.0 using LFPS signaling. Is that also differential signaling ? How it differs than LVDS ? 

[thm_w]

I found somewhere that USB3.0 using LFPS signaling. Is that also differential signaling ? How it differs than LVDS ?

Google:
http://www.xillybus.com/tutorials/usb-ltssm-lfps-power-management
https://www.truechip.net/truechip1/blog-details/low-frequency-periodic-signaling-(lfps)-in-usb-3.x/3

"The LFPS (Low Frequency Periodic Signaling) is based upon toggling the wires between a differential '1' and '0' at a frequency between 10 - 100 MHz (12.5 - 100 MHz for SuperSpeedPlus ports) to create an LFPS burst"