Cheap FPGA development board - BRS100-GW1NR9

[BrisbaneSilicon]

See https://brisbanesilicon.com.au/brs-100-gw1nr9/.

Fully scripted workflow, see example project - https://github.com/BrisbaneSilicon/BRS-100-GW1NR9

[langwadt]

what does it do that a tang nano doesn't do?

[pcprogrammer]

I could not find quick information on the board pinout in relation to the FPGA pins.

It might be better than the Tang Nano 9K in respect to usability of the FPGA IO. On the Tang Nano the externally available IO is also used on the board itself for stuff like HDMI and other displays.

On the Tang Nano 20K I found that only 7 or 8 of the externally available IO pins are free without double use. Makes it less interesting, at least for me.

A schematic of the board would help a lot in deciding if it is worth the purchase.

[zapta]

Is it supported by yosys and the open source tool chain?  The Tang 9k is but may have a different FPGA.

https://github.com/YosysHQ/apicula

If it does, you can save yourself and your users all the installation,  license, and cross platforms issues, and use Apio, as a command line tool or using its VS Code extension, with board definition that you will add once to the Apio collection.

https://fpgawars.github.io/apio/docs/

[leon_heller]

Two boards delivered yesterday. Checked them out with the Gowin Educational EDA tools.

[leon_heller]

The Constraints file contains the pinout data. They will be providing a schematic, they tell me.

[zapta]

On the Tang Nano 20K I found that only 7 or 8 of the externally available IO pins are free without double use. Makes it less interesting, at least for me.

I cleaned up mine, LEDs, LCD connector, HDMI connector and more. 

[zapta]

The board looks simple, nice and clean, without the unnecessary extras on the Tang Nano boards. On the software side it's confusing though, supports Linux only, requires Gowin license, and assorted scripts (Apio could help here). Also, the board's Github repository contains Xilinx stuff which is even more confusing. I think it would benefit from simplification.

Also, the documentation mentions using a terminal and getting some prompt, is it from the design that runs on the FPGA or some monitor on the board?

Is the board open source? Is the schematic available?  I couldn't find any.

For quantities of 1-9, international shipping cost is fixed and costs as much as a board, half of that for Australia.

[pcprogrammer]

On the Tang Nano 20K I found that only 7 or 8 of the externally available IO pins are free without double use. Makes it less interesting, at least for me.

I cleaned up mine, LEDs, LCD connector, HDMI connector and more.

You mean, desoldered them from the board?

Definitely something to consider, but how easy is it to do without causing damage?

[leon_heller]

I used it with the Gowin Educational EDA tools without problems under Windows. No licence needed.

[zapta]

You mean, desoldered them from the board?

Definitely something to consider, but how easy is it to do without causing damage?

It's not easy, this is my second attempt ;-)

[zapta]

I used it with the Gowin Educational EDA tools without problems under Windows. No licence needed.

Do you have a download link for that version? I couldn't find it on the Gowin site.

The board's instruction could be amended to reflect the no license option. https://github.com/BrisbaneSilicon/BRS-100-GW1NR9

[bte]

I used it with the Gowin Educational EDA tools without problems under Windows. No licence needed.

Do you have a download link for that version? I couldn't find it on the Gowin site.

Do you have an account with GoWin? If not, you can get the FPGA software and programmer software from

https://magicjellybeanfpga.github.io/mjb/software.html

The links on this page point to GoWin servers so they should be good to go. The "MCU Development Software" link on this page doesn't work, however.

If you have an account, they are available at

https://www.gowinsemi.com/en/support/download_eda/

[zapta]

The latest version of Apio (released today) supports this board out of the box. This includes both the CLI and the IDE versions of Apio.

Code: [Select]

~$ cd work-brs/

~/work-brs$ apio examples fetch brs-100-gw1nr9/blinky
Copying brs-100-gw1nr9/blinky example files.
Example 'brs-100-gw1nr9/blinky' fetched successfully.

~/work-brs$ ls -al
-rw-r--r--   1 user  staff   192 Feb 27 13:51 apio.ini
-rw-r--r--   1 user  staff   953 Feb 27 13:51 blinky_tb.gtkw
-rw-r--r--   1 user  staff   628 Feb 27 13:51 blinky_tb.v
-rw-r--r--   1 user  staff   862 Feb 27 13:51 blinky.v
-rw-r--r--   1 user  staff   612 Feb 27 13:51 pinout.cst

~/work-brs$ apio upload
Using env default (brs-100-gw1nr9)
Setting shell vars.
Checking device presence...
- FILTER [VID=0403, PID=6010]
- DEVICE [0403:6010] [1:1] [SIPEED] [JTAG Debugger] [FactoryAIOT Pro]
---------------------------------------------------------------------------------------------------------------
yosys -p "synth_gowin -top blinky -json _build/default/hardware.json" -q -DSYNTHESIZE blinky.v
nextpnr-himbaechel --device GW1NR-LV9QN88PC6/I5 --json _build/default/hardware.json --write _build/default/hardware.pnr.json --report _build/default/hardware.pnr --vopt family=GW1N-9C --vopt cst=pinout.cst -q
gowin_pack -d GW1N-9C -o _build/default/hardware.fs _build/default/hardware.pnr.json
openFPGALoader -b tangnano9k -f _build/default/hardware.fs
empty
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz   
Parse file Parse _build/default/hardware.fs:
Done
DONE
Jtag frequency : requested 2.50MHz    -> real 2.00MHz   
Erase SRAM DONE
Erase FLASH DONE
Erasing FLASH: [==================================================] 100.00%
Done
write Flash: [==================================================] 100.00%
Done
CRC check: Success
================ [SUCCESS] Took 19.10 seconds ==============

The board looks to the computer like a Sipeed Tang Nano 9k.

Code: [Select]

~/work-brs$ apio devices usb

USB Devices                                                                       
┌───────────┬─────────┬──────────────┬───────────────┬─────────────────┬─────────┐
│ VID:PID   │ BUS:DEV │ MANUFACTURER │ PRODUCT       │ SERIAL-NUM      │ TYPE    │
├───────────┼─────────┼──────────────┼───────────────┼─────────────────┼─────────┤
│ 0403:6010 │   1:1   │ SIPEED       │ JTAG Debugger │ FactoryAIOT Pro │ FT2232H │
└───────────┴─────────┴──────────────┴───────────────┴─────────────────┴─────────┘


[untitiled_swan]

The board looks to the computer like a Sipeed Tang Nano 9k.

Code: [Select]

~/work-brs$ apio devices usb

USB Devices                                                                       
┌───────────┬─────────┬──────────────┬───────────────┬─────────────────┬─────────┐
│ VID:PID   │ BUS:DEV │ MANUFACTURER │ PRODUCT       │ SERIAL-NUM      │ TYPE    │
├───────────┼─────────┼──────────────┼───────────────┼─────────────────┼─────────┤
│ 0403:6010 │   1:1   │ SIPEED       │ JTAG Debugger │ FactoryAIOT Pro │ FT2232H │
└───────────┴─────────┴──────────────┴───────────────┴─────────────────┴─────────┘


I'm guessing they just used the same FTDI driver / IC as SiPEED (at least, the output of 'apio devices usb' doesn't include 'Tang Nano 9K', just 'SIPEED')... it would make sense, it's probably the cheapest option, and the driver is open-source -> https://github.com/sipeed/RV-Debugger-BL702

[Halcyon]

See https://brisbanesilicon.com.au/brs-100-gw1nr9/.

Fully scripted workflow, see example project - https://github.com/BrisbaneSilicon/BRS-100-GW1NR9

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