Programming FPGAs has nothing to do with programming CPUs. You don't write instructions which execute in run-time as you would in assembler or in C. Rather you design the hardware, then you describe it. The tools then implement it and configure FPGA accordingly. You also can write test-benches which simulate your code to make sure the hardware you described works as you expected.
There are two routes you can go.
If you want to learn low level things, figure out what are registers (flip-flops) and what is combinatorial logic (LUTs), and how they combine together to produce RTL designs.
If you like C, select Verilog
I still (have to) program in C# as part of the day job, so if they use a similar syntax I suppose that Verilog or SV may be best for me. Although I have used Pascal/Delphi in the past.
I understood the circuit building process to be similar to Boolean Algebra in that you are describing the actual components and their connections (and, nand, or, nor... etc) logic through the various 'languages' used, in order to create a circuit on the FPGA chip using software-defined components.
Is this a correct analogy?
Are all IPs basically Logic Blocks, or are some representations of entire boards/machines?
Do you have to pay for all of these if they are intellectual property?
Hello, so I recently bought a cheep Altera Intel FPGA Development Board to just play around with and hopefully learn to do something simple with. The board I have is a QMTEK Cyclone IV SDRAM Starter Kit (Model: EP4CE15F23).
Now I assume this if fairly rubbish, as it was fairly cheep, but as I said I just want something to learn the basics on. I've been a professional programmer for many years, but only ever an armature with electronics. I would say I only know the basics, although I am familiar with Boolean algebra type logic and assembly level programming. So I didn't think I'd be starting completely from nothing!
However, I'm finding this very confusing so far. Probably because my cheep board came with no instructions, unless you count a bit of paper with Chinese on it! I have googled and found many things, most of which appear to contradict each other.
I downloaded the Quartus II (free) version 13 software with what I believe to be the correct driver for my board, but this is a bit bewildering when you have no idea where to start.
I was hoping someone could point me in the direction of some good beginners resources. I'm sure there must be good beginner books written about starting out with FPGAs.
I understood the circuit building process to be similar to Boolean Algebra in that you are describing the actual components and their connections (and, nand, or, nor... etc) logic through the various 'languages' used, in order to create a circuit on the FPGA chip using software-defined components.
Is this a correct analogy?
You will almost never concern yourself with gate level logic, the tools work at that level. You declare a register as a logic vector of some width and a related process to make it register some value on some clock edge. You do not concern yourself with the D-flops that implement the register. The only difference between a register and a counter is in the process that drives it. You define a MUX in terms of its input and output characteristics, you would almost never actually implement the MUX in gate level logic. You could but you just wouldn't. It's the tool's job to work at the bottom level. I have never used a Karnaugh map for FPGA projects. The tool does that kind of thing.
Some tools (like ISE or Vivado) will display the RTL Schematic which is a diagram of the logic that was actually generated. It should have been obvious that a Register <= Register + 1; would drag along an N bit adder. I don't know what I expected but that wasn't it!
Some tools (like ISE or Vivado) will display the RTL Schematic which is a diagram of the logic that was actually generated. It should have been obvious that a Register <= Register + 1; would drag along an N bit adder. I don't know what I expected but that wasn't it!
Quartus does too, it's called RTL Viewer.