Student classes and using block diagrams

[prophoss]

I am a computer engineering student and in my digital logic class we are using block diagrams. I have never dealt with these before. They are intuitive and very easy to use. We are using some VHDL but mainly block diagrams, so far anyhow. I was wondering how much are block diagrams used in "the real world" or at least outside of academia? Are they used in industry at all? In a way I actually prefer VHDL but block diagrams are pretty easy at least for something small. I could see them getting big very quick. Thanks ahead of time, Brian

[coppice]

Block diagrams are the basic way most people communicate about how a system works. Its only when the system is broken down to the fine details of the implementation that they switch to other, and often more formal and structured, ways of presenting things.

[fourfathom]

What sort of block diagrams are you using?  There are synthesis tools that use block diagrams as the design input, where the blocks are graphical representations of common logic elements and subsystems.  I've never used this type of design entry, and hadn't seen it used in industry -- but that was 20 years ago and things might have changed since then.

Traditional block diagrams are used all the time in documentation, but these are generally high-level blocks, not standardized, drawn by the designer to illustrate the architecture of the design.

[coppice]

What sort of block diagrams are you using?  There are synthesis tools that use block diagrams as the design input, where the blocks are graphical representations of common logic elements and subsystems.  I've never used this type of design entry, and hadn't seen it used in industry -- but that was 20 years ago and things might have changed since then.

I've used several block diagram tools, for things like FSM generation, which take a block diagram image produced with a custom tool or AutoCAD, and compiled the diagram directly to a working system.

[ejeffrey]

Vivado and quartus both have a "schematic capture" tool for logic design entry at the gate level but AFAICT it is basically unused in industry.  It is nice to see simple examples and compare with verilog/VHDL but doesn't really make sense for larger projects.  It's really only useful for designs you would consider using discrete logic for but instead want to use programmable logic, although I have seen... upsettingly large academic projects done in schematic capture.

However, there are high level tools that use block diagrams or something like it.  For instance, you could roughly think of Quartus QSYS / system designer as a "block diagram" tool.  I haven't used the vivado system designer but the screenshots I have seen look even more block diagram like.  Simulink is another tools that does a similar thing, especially for signal processing and control.  These are either tying together pre-written or tool generated cores with the block diagram used for high level signal routing.  This is similar to the level you would draw when designing your system with Verilog or VHDL implementing the individual modules.  Special purpose tools lice coppice mentioned for laying out state machines also make sense although I haven't used them.

[prophoss]

All our class stuff has been low level gates. I think they are simply using them to show, since it is a block diagram, how each gate works. We run AND gates and the like with 3 or 4 inputs and then synthesis them with specific highs and lows to show the outputs. I just was wondering if they were used in any other way in a "real situation". The general consensus seems to be no except in specific situations.

[SiliconWizard]

As coppice said, block diagrams are very commonly used as a way to describe a system (not just digital design either) from a high-level POV, either as a communication tool or for documentation needs.

The potential complexity of block diagrams when the system to describe becomes large is dealt with as you normally would for any sensible approach designing such systems: hierarchy. You don't put all the fine details in a single diagram. You use high-level blocks, then in turn describe each block with its own diagram, and so on.

[Someone]

Vivado and quartus both have a "schematic capture" tool for logic design entry at the gate level but AFAICT it is basically unused in industry.  It is nice to see simple examples and compare with verilog/VHDL but doesn't really make sense for larger projects.  It's really only useful for designs you would consider using discrete logic for but instead want to use programmable logic, although I have seen... upsettingly large academic projects done in schematic capture.

Its an old paradigm, but there are active products from companies big and small still using schematic entry (mostly for carrying forward old designs). That has been one of the great promises of FPGAs, the device you are using goes obsolete but you can "easily" migrate to a new family.

[Someone]

All our class stuff has been low level gates. I think they are simply using them to show, since it is a block diagram, how each gate works. We run AND gates and the like with 3 or 4 inputs and then synthesis them with specific highs and lows to show the outputs. I just was wondering if they were used in any other way in a "real situation". The general consensus seems to be no except in specific situations.

Its still a good way to communicate connectivity/arrangements. So although a design might be entered entirely in HDL code the documentation and debugging within the tools would likely have some block diagrams and/or schematics in there.

[prophoss]

I inadvertently used the words block diagram without realizing what I was saying. I do know about block diagrams to show a system. My meaning was using them in respect to creating an FPGA file to run or analyze on quartis or the like. I noticed that y'all have covered both areas very well. Thanks!