Vivado 2025.1+: must refresh IP catalog with BD closed

[tom66]

Seems to be a regression in new Vivado.  Before, you could refresh IP cores without closing the block design.  Now you have to do that every time.  The Tcl command close_bd_design [current_bd_design] works but Xilinx have broken something that used to work without a manual command.  Makes it a pain when building custom IP cores that go through multiple simulation or logic optimisation / PNR strategy cycles.  Anyone found a workaround yet?

[asmi]

Knowing that migrating projects between versions in Vivado is such a PITA, I avoid it at all costs. As a result, I have a ton of different Vivado versions installed - I've bought a 4 TB NVME SSD (it was back in a day when you didn't have to sell your kidney to get one) specifically for it (+ for building Linux images).

[tom66]

Yeah, I sometimes wonder why I upgraded, but it's because we need the newest PetaLinux and you can't get that to work with Vivado 2022.1 (which was much less buggy!)  There are also some minor bug fixes in IP cores, although I don't think any of them would really impact me.

[asmi]

Yeah, I sometimes wonder why I upgraded, but it's because we need the newest PetaLinux and you can't get that to work with Vivado 2022.1 (which was much less buggy!)  There are also some minor bug fixes in IP cores, although I don't think any of them would really impact me.

You can use Yocto to build a Linux image, as a matter of fact you will have to soon as Petalinux is apparently going the way of dodo. I moved to Yocto as soon as it became clear that AMD has no interest in maintaining it. You still need Vivado installed to export xsa and generate a device tree - unless you fancy doing it by hand (and redoing it every time you make changes in your design), and their layers contain many useful things (like Petalinux distro definition, Zynq-specific stuff like a special build of u-boot which can program a bitstream early in the boot process so that u-boot can use devices implemented in fabric, tooling to generate mcs file to program QSPI, load Linux via JTAG, etc.). They are supposedly moving away from XSCT to to SDT, but that the part I haven't touched yet, but it looks like will have to shortly.