XC95288XL weird behavior on inputs.

[obiwanjacobi]

I am having a hard time getting my XC95288XL CPLD to work as I want/expect.
I am trying to bring up a board of my DIY Frankenstein retro computer and have currently stripped it down to just the CPLD and a clock oscillator.

The problem is with a range of memory-address lines (MA) that are critical to booting the computer.
Some of them are floating / noise + offset while I have 10k pull-up/down Rs on them.
These MA lines also connect to the CPLD (inputs).
When I program the CPLD to output on those lines, the noise is gone and I see the expected 3V3 (or 0V).

I have been playing with the user constraints file (.ucf) in ISE WebPack but that did not bring any improvements.
I can see that all my inputs are being 'removed' because I have stripped away all the logic (vhdl).
But everything I read points into the direction that it should be hi-Z then...

The only thing I can think of at this point is that I have a faulty CPLD.
Any tips or suggestions?

Schematic: https://github.com/obiwanjacobi/zalt2/blob/main/Main%20Board%20v2.0/Schematic.pdf

[momon]

I guess what you are experiencing is a classic trap in legacy Xilinx CPLD architectures (XC9500 / XC9500XL series) and the ISE WebPACK synthesis toolchain.When you stripped down your VHDL, ISE optimized away your inputs and treated those physical pins as unused pins. By default, ISE configures unused pins as active Ground, causing the CPLD to fight your external 10k pull-up resistors.

1,Change ISE unused pin properties
2,Anchor your inputs in VHDL
3,Disable bus keepers / termination in UCF

[korrenh]

I’d check the fitter report before assuming the pins are inherently driven low. On XC9500XL, a pin whose input logic was optimized away can be treated as unused, and its behavior then depends on the CPLDFit unused-I/O setting. Programmable ground is optional; otherwise the unused-I/O setting can be floating, while a keeper may preserve a previous level in user mode.

First inspect the fitted pin status and the “Create Programmable Ground pins on Unused I/Os” option. Then disconnect the external source and measure the pin through a known resistor, repeating after explicitly selecting the unused-I/O behavior. That will show whether the CPLD is driving the node, a keeper is holding it, or the board-level pull network is not connected as expected.