Author Topic: REVIEW - Rigol DS2072 - First Impressions of the DS2000 series from Rigol  (Read 1101212 times)

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Offline Teneyes

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A Tip for Math function  Intg() and Coupling
In order to check if pulse train average duty cycle is positive or negative, use Intg()
see displays
 1  60% duty cycle, the trace drifts up
 2  40% duty cycle, the trace drifts down
 3  20% duty cycle, But AC coupled drifts???
« Last Edit: July 12, 2013, 09:46:34 am by Teneyes »
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Offline marmadTopic starter

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With you up to here.  I thought "at some point the memory wouldn't be large enough" is every time sample rate is reduced. Going back and looking at one of the examples you posted, the scope is sampling at 200kSa/s because the memory depth is set to 14kpt and the timebase is 5ms. There's no room to increase the sample rate there, so that couldn't be a fix to that particular aliasing.
Huh?  ???  No room to increase the sample rate? It's sampling at 200kSa/s because the memory depth is FIXED at 14k - that's the only reason. If the sample size wasn't fixed there (if it used all 56M), it could be sampling at 500MSa/s; plenty fast enough to fix that aliasing.

Quote
What's an example where it could still sample at 2GSa/s into sample memory that it isn't doing that already?
ANYTIME up to 2ms/div it's not sampling at 2GSa/s, it could be - if it didn't use FIXED sample sizes.


« Last Edit: July 12, 2013, 09:54:01 am by marmad »
 

Offline marmadTopic starter

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From Rigol Engineering (thanks to jsykes):


"Every fixed scale, from 1mV/div to 10V/div with 1-2-5 steps (assuming probe attenuation is set to 1X, other probe attenuation settings are math based), is physically amplified or attenuated.
 
The 500uV/div and any vernier scales (those between ranges) are math based. They do not have a fixed range resistor implementation, but instead rely on a variable gain attenuator."
 

Offline ve7xen

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A little Tip for Math function  Intg()
When using an input from a Chan and the Scan rate is in mSec, then multiply the input by 1000, that way the Units calculated will be in U,  see the display
For a square wave input of -1.0  to 1.0 Vdc at 4mSec period
So integrating (+1.0 *1000) for 2 mSec = +2 Units
So integrating (-1.0 *1000) for 2 mSec  =  -2 Units
Nice work! It's useful after all!

Thanks :D

I would consider this a bug though.
73 de VE7XEN
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Offline Teneyes

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Tips for FFT
When using the FFT Math feature, it is good to know that the 'SCALE' and 'POSITION' knobs change functions,
After selecting 'CH'
        the   Scale  Knob adjusts the Time Base
        the Position Knob adjusts the Trigger postions


After selecting 'Math'
        the   Scale  Knob adjusts the Frequency Span
        the Position Knob adjusts the Center Frequency


There are 4 frequency scales at each time base setting, see display 4

Here are some FFT Displays
  1. 500KHz Carrier
  2. 500KHz Carrier with 25Khz Modulation
  3. 500KHz Carrier with 25Khz Modulation at 1st Bessel Carrier Null

  4  Table of available frequency Scales at each Timebase setting,(scales per) + Max.Freq.

EDIT added Max Freq. to Table
EDIT added Anti-Aliasing comment to table
« Last Edit: July 14, 2013, 06:45:12 pm by Teneyes »
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Offline Galaxyrise

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ANYTIME up to 2ms/div it's not sampling at 2GSa/s, it could be - if it didn't use FIXED sample sizes.
So by that reasoning, the DS2000 already does anti-aliasing:  Select the maximum memory depth and turn on anti-aliasing.  But you haven't been satisfied by that "anti-aliasing" in the rest of this thread. 
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Offline marmadTopic starter

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So by that reasoning, the DS2000 already does anti-aliasing:  Select the maximum memory depth and turn on anti-aliasing.  But you haven't been satisfied by that "anti-aliasing" in the rest of this thread.

Sheesh... man, it seems you haven't understood the process I'm talking about at all. Selecting the maximum memory depth and turning on anti-aliasing does NOT eliminate aliases at all. Plus it's insanely slow trying to decimate 56M to display memory constantly.

This seems oddly reminiscent of trying to convince you that Rigol's High-Res mode produces the same results as everyone else.
« Last Edit: July 12, 2013, 03:53:17 pm by marmad »
 

Offline Galaxyrise

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Quote
The Rigol does NOT have to do this during sampling; it could sample at full speed (2GSa/s) into sample memory - then do random decimation (to simulate the current sampling rate) to display memory
...
ANYTIME up to 2ms/div it's not sampling at 2GSa/s, it could be - if it didn't use FIXED sample sizes. (with chart that can be recomputed with simple math.)
I translate that into:
1) Sample into sample buffer at the fastest rate memory depth + time base allows (up to 2GSa/s, ofc)
2) decimate to screen

The Rigol does that now.  And we agree it doesn't fix acquisition aliasing. So that leaves me suspecting I'm missing something in your description of what you'd like the Rigol to do.
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Offline marmadTopic starter

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Quote
The Rigol does NOT have to do this during sampling; it could sample at full speed (2GSa/s) into sample memory - then do random decimation (to simulate the current sampling rate) to display memory
I translate that into:
1) Sample into sample buffer at the fastest rate memory depth + time base allows (up to 2GSa/s, ofc)
2) decimate to screen

The Rigol does that now.  And we agree it doesn't fix acquisition aliasing. So that leaves me suspecting I'm missing something in your description of what you'd like the Rigol to do.
No, the Rigol doesn't do that now.

It certainly doesn't do RANDOM decimation, and I don't think it does decimation to simulate lower sampling frequencies either.

I've written this all before:
Random decimation (stochastic sampling) is the key to anti-aliasing. Beat frequencies (aliases) are formed by regular time interval sampling.

In the image, the black crosses and dotted line show regular decimation forming an alias frequency of the true frequency. The red crosses and line show irregular (random) decimation NOT forming an alias.

« Last Edit: July 12, 2013, 05:03:24 pm by marmad »
 

Offline Galaxyrise

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Quote

In that picture, normally the sine wave is the true signal, and the black vs red crosses are what's written to sample memory. That produces results like on the Agilent. 

My confusion is with your claim that the Rigol could theoretically anti-alias without doing the random decimation before storing samples into the waveform.  If it can sample fast enough to store that sine wave into sample memory, it already doesn't alias. (If that sine wave is in sample memory, the aliased low frequency sine wave will never be what's on the screen.)
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Offline marmadTopic starter

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My confusion is with your claim that the Rigol could theoretically anti-alias without doing the random decimation before storing samples into the waveform.  If it can sample fast enough to store that sine wave into sample memory, it already doesn't alias. (If that sine wave is in sample memory, the aliased low frequency sine wave will never be what's on the screen.)

It's about speed!

At 5ms/div, with a 56M sample length, the Rigol is sampling at 500MSa/s. With those settings, the interface is slow!. Do you know why? Not because of the sampling time - its capturing ~6 wfrm/s (compared to ~14 wfrm/s with a 14k sample length). It's because the Rigol has to reduce (decimate) those 56 million sample bytes to the 1400 bytes of display memory - and that takes a hell of a long time.

OTOH, let's say the Rigol only has to decimate a 4000th of that amount of memory (14k) to the 1400 bytes - do you think it might be faster? You can test this quite easily: just see how responsive the scope is at 5ms/div with a 14k sample length - and then with a 56M sample length.

So, if the DSO just grabs every 4000th byte of sample memory for decimation, things will certainly speed up, but the sample rate will then become equivalent to 125kSa/s, and all of a sudden aliasing will be a problem. But not if it does RANDOM decimation with those 14k samples, varying the number of sample it grabs between the Nth and 4000th.

So all of a sudden, you have a DSO working faster at a lower sample rate, but without aliasing.

How much faster? Test the responsiveness of the DSO with a 56M sample length at 5ms/div (it is decimating ALL 56M of 56M), and then again at 500ns/div (it is decimating only 14k of 56M).
« Last Edit: July 12, 2013, 08:34:18 pm by marmad »
 

Offline zibadun

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Quote
The Rigol does NOT have to do this during sampling; it could sample at full speed (2GSa/s) into sample memory - then do random decimation (to simulate the current sampling rate) to display memory
I translate that into:
1) Sample into sample buffer at the fastest rate memory depth + time base allows (up to 2GSa/s, ofc)
2) decimate to screen

The Rigol does that now.  And we agree it doesn't fix acquisition aliasing. So that leaves me suspecting I'm missing something in your description of what you'd like the Rigol to do.
No, the Rigol doesn't do that now.

It certainly doesn't do RANDOM decimation, and I don't think it does decimation to simulate lower sampling frequencies either.

I've written this all before:
Random decimation (stochastic sampling) is the key to anti-aliasing. Beat frequencies (aliases) are formed by regular time interval sampling.

In the image, the black crosses and dotted line show regular decimation forming an alias frequency of the true frequency. The red crosses and line show irregular (random) decimation NOT forming an alias.



rigol would have to re-architect the entire signal processing chain to do what you show. They would need make sure that the real signals are not affected by your special method and verify that interpolation still works correctly.  The cure would be worse than the disease.  It's far easier to just use the correct sampling rate (i.e. 2.5x highest frequency component). 

I use SDRs daily and haven't heard anyone doing the stochastic sampling.  This is not a common technique.  There is a better way to down sample using CIC and FIR decimating filters which take care of aliasing.  What you propose is a gimmick.  There is one Agilent paper about it and that's it, and it doesn't even mean they use this for anything but translating sample to display memory...

back to my hole :)
 

Offline marmadTopic starter

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rigol would have to re-architect the entire signal processing chain to do what you show. They would need make sure that the real signals are not affected by your special method and verify that interpolation still works correctly.  The cure would be worse than the disease.  It's far easier to just use the correct sampling rate (i.e. 2.5x highest frequency component).

"My" special method? You give me too much credit; Agilent seems to have been using it for +20 years.  ;)  Perhaps Rigol could just stop pretending that they offer anti-aliasing that works?

Quote
I use SDRs daily and haven't heard anyone doing the stochastic sampling.  This is not a common technique.

Sorry, but how would you know how common it is among DSO manufacturers? You didn't even know what it was, and that Agilent used it, up until a few days ago. And Agilent appears to have been using it since at least 1992 - apparently it works quite effectively.

Quote
There is a better way to down sample using CIC and FIR decimating filters which take care of aliasing.

Better in what way? Everything comes with a price. Agilent's random decimation technique appears to be quick, allowing them to achieve their fast wfrm/s rates.

Quote
What you propose is a gimmick.  There is one Agilent paper about it and that's it...

It's not a gimmick; there is tons of literature about stochastic sampling in general - and math to back up the fact that it eliminates aliasing (while introducing noise - which is the price for this technique, as mentioned above). To me, it seems fairly simple to understand how it works.

Quote
.. and it doesn't even mean they use this for anything but translating sample to display memory...

Actually, it's quite obvious from the images posted by others (and re-posted by me) that they've used random decimation while capturing samples at lower sample rates with anti-aliasing in effect: the artifacts are quite visible at the sample level.
« Last Edit: July 13, 2013, 12:46:33 am by marmad »
 

Offline marmadTopic starter

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I use SDRs daily and haven't heard anyone doing the stochastic sampling.  This is not a common technique.  There is a better way to down sample using CIC and FIR decimating filters which take care of aliasing.  What you propose is a gimmick.  There is one Agilent paper about it and that's it, and it doesn't even mean they use this for anything but translating sample to display memory...
I found Agilent's Patent for the (original) technique - filed in 1991, and invented by Matthew S. Holcomb of the Hewlett-Packard Company. Pretty interesting... I've attached a few images from the Patent here.

Edit: Here is also another published paper about the technique.

From the paper:
"Instead of storing every Nth digitized point, the decimator can be designed to randomly select one out of every N points for storage. In the case of the 10.01-MHz input, the points placed in memory are points randomly selected from the ten cycles of the input that occur in every 1-s interval. This random sample selection technique effectively dithers the acquisition clock during the acquisition and prevents a beat frequency from developing.

This intra-acquisition dithering technique has been used throughout the HP546XX oscilloscope product line and again in the HP54645A/D products. The effect it has on aliasing is dramatic. Fig. 7a shows the aliased 10-kHz sine wave that is produced when a 10.01-MHz sine wave is sampled at 1 MSa/s. Fig. 7b shows the same display using the dithering process just described. The resulting display is a fuzzy band much like what would be seem on an analog oscilloscope, with all signs of an aliased waveform removed."

Edit2 @zibadun:  So... still think 'my special method' is a gimmick?  :) Apparently, it works quite well eliminating aliases, doesn't affect interpolation, and the reason there isn't lots of information about it in DSO literature is because HP patented it and Agilent doesn't seem to want to talk about it - instead using terminology like the following from the 5000/6000/7000 Series Oscilloscopes User’s Guide:

"At slower sweep speeds, the sample rate is reduced and a proprietary display algorithm is used to minimize the likelihood of aliasing."
« Last Edit: July 13, 2013, 11:34:23 am by marmad »
 

Offline GermanMarkus

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Little problems with serial decoding with DS2072
« Reply #1514 on: July 13, 2013, 01:04:39 pm »
Hello altogehter - this thread is huge, but marvellous stuff here! Thanks to all contributors - that is the reason too why I'm a proud owner of a DS2072 too now :)
So - my only small problem with the great DS2072 is that I encountered a mysterious issue when serial decoding a well known 57600 baud serial datastream. The encoding showed me some wrong characters and so I thought maybe the oscillator of the selfmade sending µcontroller device is out of spec. and I tried the "user selectable" baudrate on the DS2072 and at first I used the same baudrate there too, that's 57600. And - I don't know why - when I switched to the user defined baudrate with exactely the same baudrate (57600) the decoding was perfect :)! So there seems to be an internal difference between the STANDARD 57600 baud decoding and the USERDEFINED 57600 baud decoding in the DS2072. So I tuned  down the userdefined baudrate to approx. 56200 baud and at this baudrate the decoding showed exactely the same incorrect decoding like the STANDARD 57600 baudrate mode. Does anybody have any idea or could verify this issue on his Rigol DSO.
BTW - the sending baudrate is fine and well in spec. for 57600 baud.
I'm using the latest FW 00.01.01.00.02 .
Thanks in advance! Markus
« Last Edit: July 13, 2013, 01:11:00 pm by GermanMarkus »
 

Offline zibadun

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REVIEW - Rigol DS2072 - First Impressions of the DS2000 series from Rigol
« Reply #1515 on: July 13, 2013, 03:27:35 pm »

I found Agilent's Patent for the (original) technique - filed in 1991, and invented by Matthew S. Holcomb of the Hewlett-Packard Company. Pretty interesting... I've attached a few images from the Patent here.

Edit: Here is also another published paper about the technique.

From the paper:
"Instead of storing every Nth digitized point, the decimator can be designed to randomly select one out of every N points for storage. In the case of the 10.01-MHz input, the points placed in memory are points randomly selected from the ten cycles of the input that occur in every 1-s interval. This random sample selection technique effectively dithers the acquisition clock during the acquisition and prevents a beat frequency from developing.

This intra-acquisition dithering technique has been used throughout the HP546XX oscilloscope product line and again in the HP54645A/D products. The effect it has on aliasing is dramatic. Fig. 7a shows the aliased 10-kHz sine wave that is produced when a 10.01-MHz sine wave is sampled at 1 MSa/s. Fig. 7b shows the same display using the dithering process just described. The resulting display is a fuzzy band much like what would be seem on an analog oscilloscope, with all signs of an aliased waveform removed."

Edit2 @zibadun:  So... still think 'my special method' is a gimmick?  :) Apparently, it works quite well eliminating aliases, doesn't affect interpolation, and the reason there isn't lots of information about it in DSO literature is because HP patented it and Agilent doesn't seem to want to talk about it - instead using terminology like the following from the 5000/6000/7000 Series Oscilloscopes User’s Guide:

"At slower sweep speeds, the sample rate is reduced and a proprietary display algorithm is used to minimize the likelihood of aliasing."

Good research, marmad. So if Rigol does this they would need a license from hp/Agilent? 

Btw my comment was about SDR receivers, which use a different method to decimate raw adc samples. It may be as good or better than hp's (for example  they reduce broadband noise while down converting instead of adding it)

high performance FPGAs were not so common in 91 so may be this was the best hp could do. Time to move on? :)
 

Offline Wim13

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FFT and aliasing, ( two topics in one )

@Teneyes,

I can not find in the topics here the effect of turning aliasing on in FFT, you get then double
See picture 1, aliasing off, 25 Mhz per div
See picture 2,aliasing on, 50 Mhz per div

Also the picture shape is totaly different, when off and on
I always usse alias ON on FFT, because thats is more the way it should be..

( @Marmad, in RUU, if there is a space(s) behind the TCPIP srting, it wont connect )


 

Offline marmadTopic starter

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Good research, marmad. So if Rigol does this they would need a license from hp/Agilent?

I was wondering the same thing myself. I wouldn't normally expect Rigol (or any Chinese Co.) to worry about licenses - but since they had (have?) a working relationship with Agilent, perhaps that makes a difference. It's such a simple technique - and easy to implement in software. IMO, a very clever idea by Matt Holcomb.

Quote
high performance FPGAs were not so common in 91 so may be this was the best hp could do. Time to move on? :)

I don't know. It adds ZERO overhead (at least if down while sampling) - and Agilent has built this into their latest MegaZoom silicon. So I suspect they haven't discovered anything that is as fast and effective.
« Last Edit: July 13, 2013, 04:51:58 pm by marmad »
 

Offline marmadTopic starter

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( @Marmad, in RUU, if there is a space(s) behind the TCPIP srting, it wont connect )

There shouldn't be - the last that I heard about it was that it was working over LAN.
 

Offline Wim13

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( @Marmad, in RUU, if there is a space(s) behind the TCPIP srting, it wont connect )

There shouldn't be - the last that I heard about it was that it was working over LAN.

Work fine over LAN, very good, but the first time i would not connect, then
i saw that Windows copy and paste, did a extra space at the end at: TCPIP::192.168.2.36::INSTR

But with that extra space it cannot connect. maybe you can remove spaces.

« Last Edit: July 13, 2013, 04:56:18 pm by Wim13 »
 

Offline marmadTopic starter

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But with that extra space it cannot connect. maybe you can remove spaces.

Ahhh... got it. I thought you wrote 'is' instead of 'if'.  ;)
 

Offline Wim13

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See pictures,  ALIAS OFF on FFT, it is totaly useless

The picture with alias ON, that is  how it looks on a spectrum analyser...

also added 3 kc picture, you can see that the other spikes are below the
level , as on alias off. Thats why they are not visible on alias off

For comparision, added a 3kc from an analog signal generatior
« Last Edit: July 13, 2013, 06:26:58 pm by Wim13 »
 

Offline Wim13

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@ Teneyes,   dont use rectangle, use a window, as Hanning or Blackman
« Last Edit: July 13, 2013, 07:03:41 pm by Wim13 »
 

Offline Teneyes

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@ Teneyes,   dont use rectangle, use a window, as Hanning or Blackman
@Wim  Thanks Wim , that is Wonderful
Pics
Better FFT of 3KHZ

and 3K with FM modulated with 50 Hz

Hoping Rigol changes FW so Center frequency stays at Center, for Aliasing Also
« Last Edit: July 13, 2013, 10:56:47 pm by Teneyes »
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Offline Wim13

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If you want more info on FFT and windowing...

http://www.ni.com/white-paper/4844/en/
 


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