Now that you've implemented the fixes, are you able to show any before/after screen captures from the scope itself which show the benefit of these changes?
I did not make before screen captures. The original goal was to fix the dysfunctional PLL and then it dragged into fixing its power regulator and then the other regulators. All that time the scope was face down on the bench and all I could only reach was the power button. Second - which some of people still do not seem to understand - this was about bad design practices per se and not about chasing improvements. Some people are OK to live in a house with the roof flapping in the breeze as long as the roof is not leaking. I would go and fix the roof. Third, if someone wants to do a compare he will have to design proper test cases first. One cant estimate improvements by just looking at the screen noise trace, all he will see will be noise generated in LMH6518 voltage control amplifier in the scope analog front-end which is so high that it even masks 8-bit ADC noise. And by the way, don't waste your time trying to measure the noise trace by enabling measurements/statistics - I found readings will depend on the position of the trace on the screen, which is another stupid "feature".
Oh men, too much work attaching pictures...
Nice job on the Pt. 7 post, see you can do it.
Thanks for the tip, tautech, it was a bit messy at first but worked in the end.
Yep, pic compression is the key to getting lots of content into ones posts, glad you've got that sorted.
That you've got quality pics it the pdf's is great too for those wanting to have a good look.
Would you consider reworking the previous parts by way of "Modify" and put the pdf content into the body of each post?
Yeah, I know it's a bit of work, but man that'd really top off your great work and this thread.
A high res (well sort of) version of the landscape photo of the board from Part 4 with the oscillating regulators locations marked.
Had to look twice, almost missed it
I am definitely going to open my 2072A en probe the PLL with an SA. (The SA is a Rigol 815, so I hope they are not in cahoots with each other...)
Well my January 2014 DS2072A looks not as bad as Bud's specimen.
Also I checked all the regulators and none of them oscillate. (checked with a 1074Z and the SA).
So what gives?
The PLL however is not totally clean (not as it should be). But my measuring method is rather unprofessional as can be seen in the photo (I wanted a quick and dirty first impression). But I suspect that if I attach a balun to the diff output the spectrum should not get worse?
Well my January 2014 DS2072A looks not as bad as Bud's specimen.
Could you please compare your part numbers (of LDO-s) with those on Bud's scope?
Thanks folks for testing. Your PLLs are wobbly. Would you guys want to go ahead and make the PLL change and retest ?
How did you check for oscillation? You may need a spectrum analyzer on the rail.
Check the 6.3V rail for oscillation, it was strongest spot in my case, refer to the attached picture with the blue arrow pointing to the test location (rightmost terminal of the LDO)
Is this tool good enough for a serious Job?
I think it is, I tried with #30 thickness that I used, it produced same result.
Well my January 2014 DS2072A looks not as bad as Bud's specimen.
Also I checked all the regulators and none of them oscillate. (checked with a 1074Z and the SA).
So what gives?
That gives exactly this:
That Yaigol scope owners are at the mercy of which part suppler Yaigol used for their batch of oscilloscopes, the phase of the moon, or how much the Earth shakes when their neighbor's dog farts. Isn't this is what Quality Control is supposed to take care of.
For the LDO try locating the manufacturers datasheet and see if it spells requirements on output cap ESR. As to the PLL I think I showed sufficient evidence the design is incorrect.
[/quote]
Would you consider reworking the previous parts by way of "Modify" and put the pdf content into the body of each post?
Will do when get some free time ...
...Isn't this is what Quality Control is supposed to take care of.
Edit: Sorry I read something into your post that wasn't there - posting too late at night after a drinks is not a good idea.
No, it is not.
A well known saying in manufacturing used to be 'you can't test in quality'. Meaning depending on QC as the last line of defence will always fail eventually.
The only path to quality is to make it correctly. That is where the failure is, not QC.
I have prepared the oscilloscope MSO2072A again for a measurement.
With the E-field probe, I can see no oscillate. The peaks at 500 kHz are visible along the whole motherboard.
You are measuring the wrong pin! The middle pin/ tab is the output of the 1117 regulators. If they oscillate it is clear to see with a normal probe and usually at a frequency you could hear.
Here the middle pin. Does not look like oscillate. Or do I measure wrong?
You have different LDO ICs, the same as in my oscilloscope which don't oscillate either.
I have prepared the oscilloscope MSO2072A again for a measurement.
With the E-field probe, I can see no oscillate. The peaks at 500 kHz are visible along the whole motherboard.
You are measuring the wrong pin! The middle pin/ tab is the output of the 1117 regulators. If they oscillate it is clear to see with a normal probe and usually at a frequency you could hear.
Here the middle pin. Does not look like oscillate. Or do I measure wrong?
This looks clean enough to me! All in all it starts to point towards a certain batch of oscilloscopes which might be affected.
Given the tremendous PCB real estate, Rigol could have saved 5 cents by using a printed inductor instead of a discrete inductor, seems to me. 3nH works out to about a 500 mils +- 50% on realistic stackups.
Am I naive?
Given the tremendous PCB real estate, Rigol could have saved 5 cents by using a printed inductor instead of a discrete inductor, seems to me. 3nH works out to about a 500 mils +- 50% on realistic stackups.
Am I naive?
Possibly a printed inductor was considered to be too "baked in", there isn't much scope to change values later on.
Given the tremendous PCB real estate, Rigol could have saved 5 cents by using a printed inductor instead of a discrete inductor, seems to me. 3nH works out to about a 500 mils +- 50% on realistic stackups.
Am I naive?
Possibly a printed inductor was considered to be too "baked in", there isn't much scope to change values later on.
Understood, but the PLL is not changing like the LDOs can, right? What's the second source for a ADF4360-7?
Given the tremendous PCB real estate, Rigol could have saved 5 cents by using a printed inductor instead of a discrete inductor, seems to me. 3nH works out to about a 500 mils +- 50% on realistic stackups.
Am I naive?
Possibly a printed inductor was considered to be too "baked in", there isn't much scope to change values later on.
Understood, but the PLL is not changing like the LDOs can, right? What's the second source for a ADF4360-7?
To be honest, I'm not familiar with the part. Do Analog make a range that use the same footprint? Moving to a cheaper or more available part in the same series is my first thought.
I started populating
Part 5, pls go to the first page of the thread to read.
It is again 3am in the morning... oh boy.
EDIT March 24: Added JFET buffer info.
Part 5. Front End performance
This may be kind of stupid, why attenuate and then compensate by amplifying. My guess it is a compromise to have an input stage with wide range of V/Div settings.
I've just emerged from a Tek 465's front end. For comparison that consists of
- two switchable attenuators (0/20dB, 0/40dB) in series, giving the 1/10/100/1000 steps
- followed by cascode amplifiers with gain that can be reduced, giving the 1/2/5 steps
The 0dB+0dB+full gain -> 5mV/div, of course.
So how come the total loss of the two attenuators is 48dB but we measured only 32dB at VGA output? Apparently the VGA compensates for the missing 16dB loss. This may be kind of stupid, why attenuate and then compensate by amplifying. My guess it is a compromise to have an input stage with wide range of V/Div settings.
This is actuallly very common in oscilloscope front-ends. The atttenuator also serves as an overvoltage protection circuit.
How did I make these screenshots ?
Bandwidth test
Raise/Fall time test
How did I make these screenshots ?
Two practical options come to mind:
Mirrored the R in some editing software, or changed the image in the firmware, recalculated the checksum and installed it.
The 2nd way is cooler, so I hope thats what you did
3rd option is mounting the installed filesystem, find the image and change it. That would get bonus points as I think no-one else has done that before...