So look at the pictures and tell me how they agree or disagree with your theoretical explanations.
Theory predicts SNR = 40 dB at 9.8 MHz sine wave for RMS jitter 160 ps (it's your measurement for 9.8 MHz square wave).
Your picture shows a little worse performance, at 9.8 MHz SNR is about 25 dB or something like that.
The worse performance in reality can be explained by not enough precision of your equipment.
Probably RMS jitter is more than 160 ps at 9.8 MHz.
According to your pictures RMS jitter is about 900 ps.
And in overall my theoretical explanation pretty well corresponds with your pictures.
4ns jitter is totally absent from sine waves and anything else based on sine waves
this 4 ns IS PRESENT on sine wave, but you don't see it on oscilloscope, because sine wave has too slow slope. You're need to use higher frequency sine wave in order to see it on oscilloscope. Or just use spectrum analyzer, it will show you this jitter (as parasitic spectral components) for sine wave on any frequency.
This picture will explain you why this 4 ns jitter is present on sine wave, but you don't notice it on oscilloscope:
First, we should define jitter, which could involve the generator sample clock, the scope/FFT trigger gate or the DDS process itself.
How this 4ns sample spacing constraint affects the output varies wildly with frequency.
You shouldn't infer that all of the things you see on the FFT are a result of jitter (as I've defined it) or that a certain s/n ratio implies a certain level of jitter.
Look at the 10 MHz square wave photos. The period and width variations are pretty low, but on the FFT, in addition to the expected odd harmonics, you see peaks at 0, 20 and 40MHz. Why?
So in the 9.8MHz case, jitter (as defined by me and as measured by the scope) goes up because the leap-nanosecond method doesn't yield uniform results, but it is still much closer than I expected.
In any case, the bulk of the pseudo-noise you see on the FFT is caused by the variation in the duty cycle from period to period, which I would characterize as non-harmonic distortion--but I'm open to better terminology if anyone has an idea.
Now the sine waves just don't have this particular issue.
That's a very nice picture you've provided. However, it does seem to be based on a false premise. I've looked quite closely at the sine wave zero crossing points. Increasing the Y amplifier gain is an effective way to steepen up the flanks of any waveform to unmask any such hidden DAC clock jitter artefacts. At best, all I can see is the usual random jitter noise present on all wave forms.
I think it pays to be a little more hard-hearted with sellers. You have 30 days from the last delivery date to file INR, and some of these guys will say anything to try and run the clock out. This is seller honghong20, right? I haven't received mine nor you yours, so I think it is possible that no packages have been sent. Talk of refusing packages is pretty strange--you should NEVER refuse a package according to eBay--and the seller wouldn't want to incur the return shipping charges that would likely exceed the value of the transaction.
Quite obviously, this idea is a non-starter. The method actually being used by Feeltech to preserve a 7ns rise and fall time at all frequencies has come with the less contentious penalty of a 4ns jitter which is a very respectfully low level of jitter compared to what was being accepted in high end professional test equipment costing hundreds of times more only a decade ago.
That's a very nice picture you've provided. However, it does seem to be based on a false premise. I've looked quite closely at the sine wave zero crossing points. Increasing the Y amplifier gain is an effective way to steepen up the flanks of any waveform to unmask any such hidden DAC clock jitter artefacts. At best, all I can see is the usual random jitter noise present on all wave forms.
You cannot deceive nature and invent a perpetual motion machine.
In the same way you cannot deceive nature and produce jitter free sine wave which is clocked from the source with jitter.
The jitter doesn't linked to waveform, it is linked to time error. The jitter will be exactly the same for any kind of waveform. Because time error doesn't depends on waveform, it depends the fundamental frequency and DAC sample rate relation. You cannot eliminate it at fixed sample rate. It doesn't matter what kind of waveform you will use, the jitter will be there...
That's a very nice picture you've provided. However, it does seem to be based on a false premise. I've looked quite closely at the sine wave zero crossing points. Increasing the Y amplifier gain is an effective way to steepen up the flanks of any waveform to unmask any such hidden DAC clock jitter artefacts. At best, all I can see is the usual random jitter noise present on all wave forms.
You cannot deceive nature and invent a perpetual motion machine.
In the same way you cannot deceive nature and produce jitter free sine wave which is clocked from the source with jitter.
The jitter doesn't linked to waveform, it is linked to time error. The jitter will be exactly the same for any kind of waveform. Because time error doesn't depends on waveform, it depends the fundamental frequency and DAC sample rate relation. You cannot eliminate it at fixed sample rate. It doesn't matter what kind of waveform you will use, the jitter will be there...
I'm assuming you don't actually have either in your possession to run these tests
First, Nyquist says that I can PERFECTLY reproduce a sine wave (in theory) as long as my sample rate is more than 2x the fundamental frequency and my output filter completely removes all bandwidth above the Nyquist frequency. In reality, of course, it is easier to use a higher sample rate because the output filters can be made more easily.
Second, the fact that the sample rate is not a multiple or factor of the frequency is completely irrelevant. It can be ANY NUMBER more than 2X. A sample rate that is not related to the frequency is NOT jitter. All I have to do is accurately solve the equation f(x) = (amplitude * sin (frequency * 2 *pi *x)) with the appropriate constants for each sample point and my output will be perfect.
Third, even your assertion that you can't get a perfect sine wave from a clock with jitter is wrong, although in practice it would generally be true. If you apply a technique used in Equivalent Time Sampling on some DSOs, you can have the samples at a more or less random rate (as long as it always exceeds Nyquist) as long as you are able to accurately measure the exact timing of the sample and apply the calculation to that time.
I don't have it, I planned to buy it, but later changed my decision because of this issue with jitter which is reported by other users. I thought this is just DAC aperture jitter. But pantelei4 shows that there is much worse issue with jitter.
250MSa
250MSa
OMG
DAC904 is 165 MHz according to datasheet, so it is very overclocked
Here is a new simulation with better resolution for DAC square wave output at 250 MHz for 10 MHz and 9.8 MHz with 32 bit NCO and no interpolation (just switch between max and min value).
It seems that the simulation result is almost identical with FFT measurements from bdunham7.
So, FY6600 definitely doesn't use interpolation for square wave.
Just simple NCO with 32 bit accumulator and simple min/max switch.
Quote from: bdunham7 on Today at 06:21:51 am
First, we should define jitter, which could involve the generator sample clock, the scope/FFT trigger gate or the DDS process itself.
Check https://en.wikipedia.org/wiki/Jitter
for some aspects & definition.
Regards, Frans
hello, after thinking about it I changed my mind, I just bought a Kkmoon FY6800 60mHz, it was not worth saving dollars from a 30mHz to a 60mHz, on aliexpress.com, I hope it arrives in good condition.
Quote from: bdunham7 on Today at 06:21:51 am
First, we should define jitter, which could involve the generator sample clock, the scope/FFT trigger gate or the DDS process itself.
Check https://en.wikipedia.org/wiki/Jitter
for some aspects & definition.
Regards, Frans
I guess I didn't say that very well. By 'define jitter' I didn't mean jitter as a general concept--I think we can just assume that we are all talking about periodic jitter here as that is pretty standard and in any case periodic jitter is what my scope measures directly.
What I'm getting at is that you can't simply state that a particular signal has a certain amount of jitter, you need to define the points at which you measure that define the period. I'm not talking about tracing the jitter back to its source, just examining the signal as it is. If you have a device that is triggered by the rising edge of a clock signal, it makes sense to define the period as the time between zero crossings of the rising edge and jitter as the variation from period to period. You can pick a different place to measure as long as you say what it is. Failing to agree on this can result in vastly different results and I've come up with an example.
I'm imagining a system where you have an ADC used for audio recording at 192KSa/s and the sample-and-hold circuit is clocked to this signal, triggered on the rising edge. I've set up a signal generator to produce a 192KHz square wave but with the duty cycle modulated by noise with a maximum deviation of 20%. This is the first picture and you can see that the falling edge varies but the critical rising edge is stable and shows a few hundred picoseconds jitter. Not great but good enough. The next picture is an FFT of that signal and it shows a 192KHz signal with a lot of noise. Without the modulation, the noise floor would be off the bottom of the screen.
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So now we take the signal and simply invert it. I did this by reversing the polarity of the signal generator, not the scope. The rising and falling edges swap places and now you have a very jittery signal, totally unacceptable for the purpose I stated. However, if I change the trigger on the scope to the falling edge, it goes right back to the lower jitter number. And, as expected, an FFT of the inverted signal is exactly the same.
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This should all seem obvious, but maybe it isn't. You can't look at an FFT of a signal and declare that it has a certain amount of jitter. Jitter is not a single number that can be assigned to a signal without further qualification. Equivalent jitter? Some other term? Maybe. But here I've shown a simple example of a signal that may work very well as a low-jitter (or low-enough jitter) clock and yet shows huge noise on an FFT that is indistinguishable from jitter. And the measured jitter varies by factor of 50 depending on what point you trigger at.
@JBG
I think we're talking of two different things. My demonstration has nothing to do with the 4ns issue and wasn't even done on a Feeltech sig gen. I'm demonstrating that you you can have two clock signals, one with no measured jitter (assuming a particular measurement point--in this case the rising edge) and one with a lot and both can have identical FFTs.
You should go one step further with your demo and see what the calculated RMS jitter is, if you have the feature. You'll be suprised at how low this can be even when the deviations are due to the 4ns effect. And try using 5 MHz as your 'magic' frequency because it is at 5 MHz that the FY6600 is truly free of the 4ns effect, as both period and duty cycle are times perfectly.