ISE is a flaming pile of bug ridden crap, an amalgamation of separate software absorbed into the parent company over the past 10 years held together with duct tape. Even Xilinx reps admit it sucks.
Nice video Dave. Softcore CPU I think for a FPGA defeats the purpose of FPGA use. What I understand (in real world terms) is that the FPGA is like a programmable DSP where you can process input signals with many operations all in parallel or due time before the signal changes, but a softcore CPU does things in sequence so one could (as many do) simply use an external ARM CPU with the FPGA.
Nice video Dave. Softcore CPU I think for a FPGA defeats the purpose of FPGA use. What I understand (in real world terms) is that the FPGA is like a programmable DSP where you can process input signals with many operations all in parallel or due time before the signal changes, but a softcore CPU does things in sequence so one could (as many do) simply use an external ARM CPU with the FPGA.The power comes from the combination of FPGAs and CPUs. In a complex system usually you have something like slow user input, controller logic, USB connection etc. Implementing this in a HDL is a waste of FPGA logic elements, because even for a simple USB device module you would need maybe a FPGA which costs $40 instead of $20 for the rest of your project, so just add an external $3 microcontroller with hardware USB and you are done.
For scanning slow user input and controlling the system, a soft core might be good for the same reason. Implementing all in a HDL means that you need logic elements for each function you want to implement, and all functions are available in parallel, driven by state machines, because there is no partial reconfiguration of the FPGA (at least not for the cheaper parts). Using a simple soft core like NIOS saves lots of logic elements. Then a NIOS program can configure the functions you've implemented in the FPGA. For example you could implement a VGA generator and a multichannel audio mixer (I've done both, AES3 as audio input/output, up to 192 kHz, 128 channels in parallel) in the FPGA, and a NIOS program implements the drawing functions in the framebuffer, reads the keys or a mouse and configures the routing matrix and mixing coefficients.
Its nice how they emulate old computers on FPGA
ISE is a flaming pile of bug ridden crap, an amalgamation of separate software absorbed into the parent company over the past 10 years held together with duct tape. Even Xilinx reps admit it sucks.
Amen! I thought I hated working with FPGAs when we started working with Xilinx ones in school, but I'm using a Cyclone in a current project and the whole toolkit is a joy to work with.
Some pointers for people who want to start with FPGAs:
1. Simulators are extremely accurate in "post place and route" mode, enough to develop the entire project without programming a chip even once. So the only real reason to buy a board is to have that cool feeling when the first LED blinks on a real hardware.
2. There is an open-source simulator called iverilog (for Verilog only, obviously). It works on Win/MAC/Linux, really fast and easy to use. The benefit of using it on the initial stages is that it is possible to use your favorite IDE and not an IDE from the chip vendor, which are sort of slow and not all that great.
the problem with xilinx is that they don't care. Their target is the medium ot large company that wants to use 'the beasts'. anyone playing at that level uses Synopsys as a frontend and uses the fusemapper as a backend. done. nobody in that playfield uses ISE.
Altera does care about the low end to mid range market as that is where their bread and butter is. so they differentiate by making good tools.
For home I have used almost every OS out there and over the decades have decided not to use Windows
...
So I have been waiting a long while waiting for an OS/X hosted fabric toolchain. In the mean time I have been using other solutions like analog processing or PIC multi-processing. The down side is some projects are a bit large. No matter how you place then a dozen PICS take up allot of room.
ISE is a flaming pile of bug ridden crap, an amalgamation of separate software absorbed into the parent company over the past 10 years held together with duct tape. Even Xilinx reps admit it sucks.
Amen! I thought I hated working with FPGAs when we started working with Xilinx ones in school, but I'm using a Cyclone in a current project and the whole toolkit is a joy to work with.third that !
the problem with xilinx is that they don't care. Their target is the medium ot large company that wants to use 'the beasts'. anyone playing at that level uses Synopsys as a frontend and uses the fusemapper as a backend. done. nobody in that playfield uses ISE.
Altera does care about the low end to mid range market as that is where their bread and butter is. so they differentiate by making good tools.
always @(posedge CLK)
if (!CE) begin
shifter[15:0] <= shifter{[14:0,MOSI}; // if CE is low : shift MOSI in to a shiftregister controlled by the CLK
end
...
always_comb begin
case address[3:0]
4'b0000 : char = char0;
4'b0001 : char = char1;
.. contine the decoder her for all 16 locations
end case
end
endmodule
I suspect that most engineers and most projects are not consumer projects and the cost of an FPGA is really not all that significant. In fact, other than the work I'm doing now with my own business, I'd have to think hard if I EVER worked on a shrink wrapped consumer product, or even know anyone who has. I believe the answer is no. A friend of mine works for iRobot but he doesn't work on those cute little vacuum cleaners.
and here lies your problem, You suspect wrong. Market is all about optimization of cost. Altium bet on FPGAs taking over design, but FPGAs are expensive, and dedicated hardware will ALWAYS BE CHEAPER. Not to mention thanks to globalization its cheaper to hire 100 chinese/indian monkeys to code complete works of William Shakespeare than to pay living wage to 3 CS/EEs on staff.
There's a reason FPGA starts keep going up. I can design one basic architecture with some basic IO on it, and then keep reusing that over and over and over and over again, just tweaking a bit here and there, adding a little here, removing a little there, etc etc. You're stuck thinking about high volume production. I'm starting to wonder if you understand how much engineering is done that DOESN'T target a high volume consumer market?
For the record, I'm not trying to be argumentative here. There is just a huge amount of embedded engineering that is done where it doesn't matter one bit if a part cost $3 or $300. It is completely and utterly dwarfed by a team of engineers, billing out at $100+ an hour, for 6 months. Whatever gets you to the finish line soonest and with the greatest chance of success is by far the cheapest solution.
(Snip.)
Throw that at the little PIC or AVR and this is what will happen :
it will jump out of its socket , scamper to the far corner of your circuit board , roll over on it's back , curl up it's tiny little legs and simply die...
always @(posedge CLK)
if (!CE) begin
shifter[15:0] <= shifter{[14:0,MOSI}; // if CE is low : shift MOSI in to a shiftregister controlled by the CLK
end
...
always_comb begin
case address[3:0]
4'b0000 : char = char0;
4'b0001 : char = char1;
.. contine the decoder her for all 16 locations
end case
end
endmodule
You must have typed it faster than speed of light :-)
shifter[15:0] <= shifter{[14:0,MOSI};
should be
shifter[15:0] <= {shifter[14:0],MOSI};
also 'encase' is a single keyword. I just could not look at broken code even if it is just to give an idea. I am a programmer as you may noticed.
Most importantly I see you are using 'always_comb' which is only available in Sytemverilog. I found support for Systemverilog in tools like Xilinx ISE and Altera Quartus is spotty and inconsistent. Synopsis is the only company who's tools support Systemverilog in full, but I know that only from rumors since I never used Synopsis tools myself.
I have read an article at EEE Spectrum magazine saying that FPGA developer skills will be one of the most sought after in coming years. Today I see only 2 (two) open positions related to FPGA in Toronto and they were there for ages, not sure if they are real. It did no became as popular as some anticipated. However use of FPGAs in sub millisecond stock trade systems and oil exploration had very impressive growth - they can afford it.
Despite all the progress in tools developing with FPGA still very hard and expensive. Once you have HDL code and try to run it you discover that it runs at 68MHz instead of expected 210MHz, why?!? to fix it you need to dig into 2000 pages of datasheets and app notes. You find things like synthesized RTL logic has too much fanout in one place screwing your timing, then simultaneous switching if too many cells causes problem in another part of device. Then you switch device or recompile and all problems are back but in different places... nice abstraction that tools promised to provide falls apart completely.
(Snip.)
Throw that at the little PIC or AVR and this is what will happen :
it will jump out of its socket , scamper to the far corner of your circuit board , roll over on it's back , curl up it's tiny little legs and simply die...
That comparison doesn't sound quite right?
of a *pair* of Beagle Bone Blacks, at $45 each, for computational and I/O power?
For home I have used almost every OS out there and over the decades have decided not to use Windows
...
So I have been waiting a long while waiting for an OS/X hosted fabric toolchain. In the mean time I have been using other solutions like analog processing or PIC multi-processing. The down side is some projects are a bit large. No matter how you place then a dozen PICS take up allot of room.
Sorry, but that's just retarded. Stick Quartus/ISE/whatever in Parallels or dual-boot Windows or Linux. The amount of time you actually spend dealing with the software can be minimal. You don't need it to edit Verilog. You're going to try to use a dozen freaking PICs for parallel tasks because you don't like "Winblows"? I don't like it either but I can boot into it when I want to use my logic analyzer or universal programmer or any number of other things that require it. I just take one Benadryl for the allergic reaction and all is good
@f_e, just my experience, but Quartus works a treat on the latest Debian with no effort.
You cant do it with software. (Snip.)
Why is dual boot not an option?